Implantable microelectronic device and method of manufacture
First Claim
1. A device, comprising:
- a microelectronic device located on a silicon substrate, said microelectronic device having a conductive contact pad surrounded by electrically insulating material,at least one patterned first metal layer formed on said contact pad and extending beyond the edge of said contact pad,at least one patterned second metal layer formed over said first metal layer, said second metal layer having an exposed upper contact surface,an electrically insulating material layer hermetically surrounding said microelectronic device and said patterned layers, said electrically insulating material layer having an aperture which exposes said upper contact surface.
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Accused Products
Abstract
An implantable hermetically sealed microelectronic device and method of manufacture are disclosed. The microelectronic device of the present invention is hermetically encased in a insulator, such as alumina formed by ion bean assisted deposition (“IBAD”), with a stack of biocompatible conductive layers extending from a contact pad on the device to an aperture in the hermetic layer. In a preferred embodiment, one or more patterned titanium layers are formed over the device contact pad, and one or more platinum layers are formed over the titanium layers, such that the top surface of the upper platinum layer defines an external, biocompatible electrical contact for the device. Preferably, the bottom conductive layer is larger than the contact pad on the device, and a layer in the stack defines a shoulder.
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Citations
9 Claims
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1. A device, comprising:
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a microelectronic device located on a silicon substrate, said microelectronic device having a conductive contact pad surrounded by electrically insulating material, at least one patterned first metal layer formed on said contact pad and extending beyond the edge of said contact pad, at least one patterned second metal layer formed over said first metal layer, said second metal layer having an exposed upper contact surface, an electrically insulating material layer hermetically surrounding said microelectronic device and said patterned layers, said electrically insulating material layer having an aperture which exposes said upper contact surface. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification