Sample and hold technique for generating an average of sensed inductor current in voltage regulators

• US 7,710,084 B1
• Filed: 03/19/2008
• Issued: 05/04/2010
• Est. Priority Date: 03/19/2008
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Guo, Yigang
• Primary Examiner(s): Riley; Shawn
• Application Number:
  US12/077,463
• Time in Patent Office: 776 Days
• Field of Search: 323/244, 323/283, 323/285, 323/288
• US Class Current: 323/224
• CPC Class Codes: G01R 19/003 Measuring mean values of current or voltage during a given time interval
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A sample and hold inductor current sense configuration senses inductor current flowing through an output inductor of a voltage regulator and generates an average of the sensed inductor current. The average of the sensed inductor current may be generated from samples of peaks and valleys of the sensed inductor current. For example, the peak of the sensed inductor current may be stored in a first capacitor and the valley of the sensed inductor current may be stored in a second capacitor. The first and second capacitors may be coupled together to generate the average of the sensed inductor current. The average of the sensed inductor current may be provided to a droop control circuit to control droop of an output voltage of the voltage regulator. An input offset voltage of a current sense amplifier sensing the inductor current may be calibrated between samplings of the sensed inductor current.

Claims

1. A method of generating an average of an inductor current in a voltage regulator, the method comprising:

sampling a peak of a sensed inductor current at a first sample window, the sensed inductor current being indicative of inductor current flowing through an output inductor of a voltage regulator;

sampling a valley of the sensed inductor current at a second sample window; and

generating an average of the sensed inductor current based on the sampling of the peak and the valley of the sensed inductor current.

2. The method of claim 1 further comprising:

calibrating an input offset voltage of a current sense amplifier providing the sensed inductor current between the first sample window and the second sample window.

3. The method of claim 1 further comprising:

storing the sampled peak of the sensed inductor current in a first capacitor;

storing the sampled valley of the sensed inductor current in a second capacitor; and

wherein the average of the sensed inductor current is generated by coupling the first capacitor to the second capacitor to share charges between them.

4. The method of claim 3 further comprising:

coupling charges from the first and second capacitors to a third capacitor, the voltage across the third capacitor being provided to a droop control circuit to control droop of an output voltage of the voltage regulator.

5. The method of claim 1 further comprising:

generating an emulated sensed inductor current emulating the sensed inductor current; and

using the emulated sensed inductor current for current mode control of the voltage regulator.

6. The method of claim 5 wherein the emulated sensed inductor current is generated by feeding a ramp signal to a capacitor where a sample of the sensed inductor current is held.

7. The method of claim 1 wherein the inductor current is sensed by a current sense amplifier from a lossless current sense circuit.

8. A voltage regulator circuit comprising:

a lossless current sense circuit configured to sense an inductor current flowing through an output inductor of a voltage regulator circuit;

a current sense amplifier coupled to the lossless current sense circuit to generate a sensed inductor current indicative of the inductor current; and

a sample and hold circuit configured to sample and hold a peak of the sensed inductor current, to sample and hold a valley of the sensed inductor current, and to generate an average of the sensed inductor current based on the sampled peak and valley of the sensed inductor current.

9. The voltage regulator circuit of claim 8 wherein the sample and hold circuit comprises:

a first capacitor configured to hold the sampled peak of the sensed inductor current;

a second capacitor configured to hold the sampled valley of the sensed inductor current;

wherein the first capacitor and the second capacitor are coupled together to share charges between them and thereby generate the average of the sensed inductor current.

10. The voltage regulator circuit of claim 9 further comprising:

a third capacitor configured to hold the average of the sensed inductor current.

11. The voltage regulator circuit of claim 10 wherein the third capacitor is configured to be coupled to a droop control circuit configured to use the average of the sensed inductor current to control droop of an output voltage of the voltage regulator.

12. The voltage regulator circuit of claim 8 wherein the sample and hold circuit samples the peak of the sensed inductor current at a first sample window and samples the valley of the sensed inductor current at a second sample window, and wherein an input offset voltage of the current sense amplifier is calibrated between the first sample window and the second sample window.

13. The voltage regulator circuit of claim 8 further comprising:

a current source configured to generate a current ramp signal to charge a capacitor of the sample and hold circuit to generate an emulated sensed inductor current.

14. The voltage regulator circuit of claim 13 wherein the regulator circuit uses the emulated sensed inductor current for current mode control of the regulator circuit.

15. A method of generating an average of an inductor current in a voltage regulator, the method comprising:

storing a sample of a peak of a sensed inductor current in a first capacitor, the sensed inductor current being indicative of inductor current flowing through an output inductor of a voltage regulator;

storing a sample of a valley of the sensed inductor current in a second capacitor; and

coupling the first and second capacitors together to generate an average of the sensed inductor current.

16. The method of claim 15 further comprising:

calibrating an input offset voltage of a current sense amplifier sensing the inductor current between samplings of the peak and the valley of the sensed inductor current.

17. The method of claim 15 further comprising:

generating an emulated sensed inductor current emulating the sensed inductor current; and

using the emulated sensed inductor current for current mode control of the voltage regulator.

18. The method of claim 17 wherein the emulated sensed inductor current is generated by feeding a ramp signal to a capacitor where a sample of the sensed inductor current is stored.

19. The method of claim 15 further comprising:

a third capacitor configured to store the average of the sensed inductor current and provide the average of the sensed inductor current to a droop control circuit configured to control droop of an output voltage of the voltage regulator.

20. The method of claim 15 wherein the inductor current is sensed using a lossless current sense circuit.