Arrangement and method for channel mapping in a wireless communication system

• US 7,710,926 B2
• Filed: 04/08/2003
• Issued: 05/04/2010
• Est. Priority Date: 04/08/2002
• Status: Active Grant

• Current Assignee: Sisvel International S.A. (Fineur International S.A.)
• Original Assignee: IPWireless Inc. (NVIDIA Corporation)
• Inventors: Beale, Martin
• Primary Examiner(s): Nguyen; Duc M
• Application Number:
  US10/409,281
• Publication Number:
  US 20040071172A1
• Time in Patent Office: 2,583 Days
• Field of Search: 370/203, 370/204, 370/334, 370/465, 370/543, 370/335, 370/441, 370/464, 370/476, 370/537, 714/757, 714/780, 714/810, 375/264, 375/240.27, 375/295, 375/298, 455/102, 455/103
• US Class Current: 370/335
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/653 3GPP HSDPA, e.g. HS-SCCH or DS-DSCH related
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/1812 Hybrid protocols; Hybrid automatic repeat request [HARQ]
• CPC Class Codes: H04L 1/1893 Physical mapping arrangements physical resource mapping in general H04L5/00

Abstract

An arrangement and method for channel mapping in a UTRA TDD HSDPA wireless communication system by applying interleaving functions in first (530) and second (540) interleaving means to a bit sequence to produce symbols for mapping to physical channels, the first and second interleaving means being arranged to map symbols from respectively systematic and parity bits in a predetermined scheme, e.g., mapping symbols in a forward direction when a channel has an even index number, and in a reverse direction when a channel has an odd index number. The symbols may comprise bit-pairs, each of a systematic bit and parity bit.

Systematic bits are preferably mapped to high reliability bit positions in TDD HSDPA, achieving a performance gain of between 0.2 dB and 0.5 dB. The forwards/reverse mapping allows a degree of interleaving that improves system performance in fading channels or channels disturbed by short time period noise or interference.

Claims

1. An apparatus for channel mapping in a wireless communication system, the apparatus comprising:

first interleaving logic for interleaving a bit sequence comprising systematic bits to produce an interleaved systematic bit sequence;

second interleaving logic for interleaving a bit sequence comprising parity bits to produce an interleaved parity bit sequence;

grouping logic to produce symbols from bits from the interleaved systematic bit sequence and bits from the interleaved parity bit sequence, wherein bits from the interleaved systematic bit sequence are mapped to high reliability bits of the symbol and bits from the interleaved parity sequence are mapped to low reliability bits of the symbol; and

mapping logic for mapping the symbols to an odd indexed physical channel and an even indexed physical channel, wherein the symbols are mapped in a forward or reverse direction based on the channel index.

2. The apparatus of claim 1 wherein the symbols comprise bit-pairs, the bit-pairs each comprising a systematic bit and a parity bit.

3. The apparatus of claim 1 wherein the symbols are arranged to be modulated by 16QAM modulation.

4. The apparatus of claim 1 wherein the wireless communication system is a Universal Terrestrial Radio Access Time Division Duplex (UTRA TDD) system.

5. The apparatus of claim 4 wherein the odd indexed physical channel and the even indexed physical channel are comprised in a transport channel.

6. The apparatus of claim 1 configured to operate on a High Speed Downlink Shared Channel.

7. The apparatus of claim 6 configured to operate in High Speed Downlink Packet Access.

8. A user equipment of a wireless communication system comprising an apparatus as claimed in claim 1.

9. A base station of a wireless communication system comprising an apparatus as claimed in claim 1.

10. An integrated circuit comprising the apparatus of claim 1.

11. An apparatus for channel demapping in a wireless communication system, the apparatus comprising:

de-mapping logic for de-mapping symbols in a forward or reverse direction based on a channel index, wherein symbols have been mapped to an odd indexed physical channel or an even indexed physical channel;

ungrouping logic arranged to ungroup groups of bits from symbols to produce an interleaved parity bit sequence and an interleaved systematic bit sequence, each symbol comprising parity bits and systematic bits;

first deinterleaving logic for deinterleaving the systematic bit sequence to produce a deinterleaved systematic bit sequence comprising systematic bits; and

second deinterleaving logic for deinterleaving the parity bit sequence to produce a deinterleaved parity bit sequence comprising parity bits.

12. The apparatus of claim 11 wherein the symbols comprise bit-pairs, each bit-pair comprising a systematic bit and a parity bit.

13. The apparatus of claim 11 wherein the symbols are modulated by 16QAM modulation.

14. The apparatus of claim 11 wherein the wireless communication system is a Universal Terrestrial Radio Access Time Division Duplex (UTRA TDD) system.

15. The apparatus of claim 14 wherein the odd indexed physical channel and the even indexed physical channel are comprised in a transport channel.

16. The apparatus of claim 11 configured to operate on a High Speed Downlink Shared Channel.

17. The apparatus of claim 16 configured to operate in High Speed Downlink Packet Access.

18. A user equipment of a wireless communication system comprising an apparatus as claimed in claim 11.

19. A base station of a wireless communication system comprising an apparatus as claimed in claim 11.

20. An integrated circuit comprising the apparatus of claim 11.

21. A method for channel mapping in a wireless communication system, the method comprising:

interleaving a bit sequence comprising systematic bits to produce an interleaved systematic bit sequence;

interleaving a bit sequence comprising parity bits to produce an interleaved parity bit sequence;

grouping bits from the interleaved systematic bit sequence and the interleaved parity bit sequence to produce symbols, each symbol comprising parity bits and systematic bits, wherein bits from the interleaved systematic bit sequence are mapped to high reliability bits of the symbol and bits from the interleave parity bit sequence are mapped to low reliability bits of the symbol; and

mapping the symbols to an odd indexed physical channel and an even indexed physical channel in a forward direction or a reverse direction based on the channel index.

22. The method of claim 21 wherein the symbols comprise bit-pairs, each bit-pair comprising a systematic bit and a parity bit.

23. The method of claim 21 wherein the symbols are modulated by 16QAM modulation.

24. The method of claim 21 wherein the wireless communication system is a Universal Terrestrial Radio Access Time Division Duplex (UTRA TDD) system.

25. The method of claim 24 wherein the odd indexed physical channel and the even indexed physical channel are comprised in a transport channel.

26. The method of claim 21 operable for a High Speed Downlink Shared Channel.

27. The method of claim 26 operable for High Speed Downlink Packet Access.

28. A computer-readable medium comprising computer instructions for performing the method of claim 21.

29. A method for channel demapping in a wireless communication system, the method comprising:

de-mapping symbols in a forward or reverse direction according to a channel index, wherein symbols have been mapped to an odd indexed physical channel or an even indexed physical channel;

ungrouping groups of bits from symbols to produce an interleaved parity bit sequence and an interleaved systematic bit sequence, each symbol comprising systematic bits and parity bits;

deinterleaving the systematic bit sequence to produce a deinterleaved systematic bit sequence comprising systematic bits; and

deinterleaving the parity bit sequence to produce a deinterleaved parity bit sequence comprising parity bits, wherein bits from the deinterleaved systematic bit sequence have been mapped to high reliability bits of the symbol and bits from the deinterleaved parity bit sequence have been mapped to low reliability bits of the symbol.

30. The method of claim 29 wherein the symbols comprise bit-pairs, each bit-pair comprising a systematic bit and a parity bit.

31. The method of claim 29 wherein the symbols are modulated by 16QAM modulation.

32. The method of claim 29 wherein the wireless communication system is a Universal Terrestrial Radio Access Time Division Duplex (UTRA TDD) system.

33. The method of claim 32 wherein the odd indexed physical channel and the even indexed physical channel are comprised in a transport channel.

34. The method of claim 29 operable on a High Speed Downlink Shared Channel.

35. The method of claim 34 operable in High Speed Downlink Packet Access.

36. A computer-readable medium encoded with computer program instructions for performing the method of claim 29.