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System, method and computer program product for executing a cache replacement algorithm

  • US 7,711,904 B2
  • Filed: 03/22/2007
  • Issued: 05/04/2010
  • Est. Priority Date: 03/22/2007
  • Status: Expired due to Fees
First Claim
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1. A computer processor comprising:

  • an instruction processor for processing instructions in a running program;

    a cache comprising two or more cache levels including a level one (L1) cache level and one or more higher cache levels, each cache level comprising one or more cache lines and having an associated directory having one or more directory entries;

    a useful indicator within one or more of said directory entries and associated with a particular cache line, each useful indicator being set to provide an indication that the associated cache line contains one or more instructions that are required by the running program and cleared to provide lack of such an indication; and

    a cache line fetch mechanism which utilizes the useful indicators to suppress prefetches from the higher cache levels to the L1 cache.

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