Geiger mode avalanche photodiode

• US 7,714,292 B2
• Filed: 01/17/2007
• Issued: 05/11/2010
• Est. Priority Date: 02/01/2006
• Status: Active Grant

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Kauppinen, Lasse Juhana, Agarwal, Prabhat, Sonsky, Jan
• Primary Examiner(s): Porta; David P
• Assistant Examiner(s): VU, MINDY D
• Application Number:
  US12/162,999
• Publication Number:
  US 20090008566A1
• Time in Patent Office: 1,210 Days
• Field of Search: 250/370.01, 250/370.14
• US Class Current: 250/370.01
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14658 X-ray, gamma-ray or corpuscular radiation imagers measuring X-, gamma- or corpuscular radiation G01T1/00
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes

Abstract

A avalanche mode photodiode array (102) is fabricated using a silicon on insulator wafer and substrate transfer process. The array includes a plurality of photodiodes (100). The photodiodes (100) include an electrically insulative layer (206), a depletion region (204), and first (208) and second (210) doped regions. An interconnection layer (212) includes electrodes (214, 216) which provides electrical connections to the photodiodes. The photodiode array (102) is carried by a handle wafer (217).

Claims

1. An avalanche photodiode comprising:

a semiconductor depletion region;

an anode;

a cathode;

wherein incident photons having a wavelength in the blue end of the visible spectrum are absorbed in the depletion region so as to generate charge carriers, and wherein the charge carriers undergo impact ionization in the depletion region so as to generate an avalanche current in the photodiode.

2. The photodiode of claim 1 wherein the photodiode comprises a light receiving face and an electrically insulative layer, and wherein the electrically insulative layer is disposed between the light receiving face and the depletion region.

3. The photodiode of claim 2 wherein the electrically insulative layer is fabricated from the buried oxide layer of an SOI wafer.

4. The photodiode of claim 2 comprising means for reducing an effect of lattice imperfections at an interface between the depletion region and the electrically insulative layer.

5. The photodiode of claim 4 wherein the means for reducing comprises a thin doped semiconductor layer.

6. The photodiode of claim 2 wherein the photodiode is back illuminated.

7. The photodiode of claim 2 wherein the photodiode comprises:

a handle wafer;

an interconnection layer disposed physically between the depletion region and the handle wafer.

8. The photodiode of claim 1 including a scintillator in optical communication with the depletion region.

9. The photodiode of claim 8 wherein the scintillator comprises one of LySO, LSO, LGSO or LaBr.

10. The photodiode of claim 1 wherein the anode and cathode are interdigitated.

11. A method of manufacturing an array of avalanche photodiodes using a silicon on insulator wafer, which wafer includes a substrate, a silicon layer, and a buried oxide layer disposed physically between the substrate and the silicon layer, the method comprising:

forming a plurality of avalanche photodiodes in the silicon layer, the photodiodes including an anode, a cathode, and a depletion region;

forming a plurality of electrodes in electrical communication with the anodes and cathodes of respective photodiodes, wherein the plurality of electrodes are disposed on a side of the silicon layer which is opposite the buried oxide layer;

forming a plurality of isolation regions by etching a plurality of trenches which extend to the buried oxide layer which isolates each of the plurality of photodiodes from adjacent photodiodes; and

removing the substrate, whereby the photodiodes are illuminated through the buried oxide layer.

12. The method of claim 11 further comprising attaching a handle wafer to the array, wherein the plurality of electrodes are disposed physically between the handle wafer and the silicon wafer.

13. The method of claim 11 including forming an isolation region which provides electrical isolation between photodiodes in the array.

14. The method of claim 13 wherein the isolation region is formed using a local oxidation of silicon technique.

15. The method of claim 11 including forming an implantation layer at an interface between the buried oxide layer and the silicon layer.

16. The method of claim 11 including placing a scintillator in optical communication with the buried oxide layer.

17. An ionizing radiation detector produced using the method of claim 16.

18. A photodiode array produced using a silicon on insulator wafer, which wafer includes a substrate, a silicon layer, and a buried oxide layer disposed physically between the substrate and the silicon layer, wherein the photodiode array is produced using a process comprising:

forming a plurality of avalanche photodiodes in the silicon layer, the photodiodes including an anode, a cathode, and a depletion region;

forming a plurality of electrodes in electrical communication with the anodes and cathodes of respective photodiodes, wherein the plurality of electrodes are disposed on a side of the photodiodes opposite the buried oxide layer;

attaching a handle wafer to the silicon on insulator wafer, wherein the electrodes are disposed physically between the handle wafer and the photodiodes;

forming a plurality of isolation regions by etching a plurality of trenches which extend to the buried oxide layer which isolates each of the plurality of photodiodes from adjacent photodiodes; and

removing the substrate from the silicon on insulator wafer, whereby the photodiodes are illuminated through the buried oxide layer.

19. The photodiode of claim 18 wherein the process further comprises forming an isolation trench which extends between the interconnection layer and the buried oxide layer.

20. An avalanche photodiode comprising:

a first doped semiconductor region which forms a cathode of the photodiode;

a second doped semiconductor region which forms an anode of the photodiode;

a third semiconductor region in optical communication with a light receiving face of the photodiode, wherein substantially all of the third semiconductor region is depleted when the photodiode is operated in the avalanche mode;

an interconnection layer including a first electrode in electrical communication with the first doped semiconductor region and a second electrode in electrical communication with the second doped semiconductor region, wherein the third semiconductor region is disposed physically between the interconnection layer and the light receiving face.

21. The photodiode of claim 20 wherein the first doped semiconductor region, the second doped semiconductor region, and the third semiconductor region form one of a pπ

n or a pvn photodiode.

22. The photodiode of claim 21 wherein the third semiconductor region has a thickness of less than about 500 nm.

23. The photodiode of claim 20 including an isolation trench which surrounds the photodiode.

24. The photodiode of claim 20 including an electrically insulative layer disposed between the third semiconductor region and the light receiving face.

25. The apparatus of claim 24 wherein the electrically insulative layer comprises silicon dioxide and wherein the electrically insulative layer is substantially transmissive of light having a wavelength in the blue end of the optical spectrum.

26. The apparatus of claim 25 including a passivation layer disposed at an interface between the third semiconductor region and the electrically insulative layer.

27. The apparatus of claim 20 including a handle wafer disposed on a side of the photodiode opposite the light receiving face.

28. The apparatus of claim 27 wherein the handle wafer comprises glass.

29. The apparatus of claim 20 wherein the first and second doped semiconductor regions are concentric.

30. The apparatus of claim 20 including a scintillator in optical communication with the third semiconductor layer.

31. An apparatus comprising:

an examination region;

an object support adapted to support an object under examination in the examination region;

a radiation detector array including;

a radiation sensitive face which faces the examination region;

an array of avalanche photodiodes, wherein each photodiode includes an anode, a cathode, and a depletion region, wherein photons absorbed in the depletion region of a photodiode generate charge carriers, and wherein the charge carriers undergo impact ionization in the depletion region of the photodiode so as to generate an avalanche current in the photodiode;

an interconnection layer including a plurality of electrodes which provide electrical connections to the photodiodes, wherein the interconnection layer is disposed on a side of the photodiode array which is opposite the radiation receiving face, and wherein the interconnection layer contains a quenching resistor.

32. The apparatus of claim 31 wherein the radiation detector array includes a scintillator which receives ionizing radiation from the examination region.

33. The apparatus of claim 32 wherein the scintillator includes one of lutetium and lanthanum.

34. The apparatus of claim 31 wherein the avalanche photodiodes are operated in the Geiger mode.