AC/DC light emitting diodes with integrated protection mechanism

• US 7,714,348 B2
• Filed: 03/07/2007
• Issued: 05/11/2010
• Est. Priority Date: 10/06/2006
• Status: Active Grant

• Current Assignee: AC Led Lighting, LLC
• Original Assignee: Ac-Led Lighting LLC
• Inventors: Jiang, Hongxing, Lin, Jingyu, Fan, Zhaoyang, Li, Jing
• Primary Examiner(s): Mandala; Victor A
• Application Number:
  US11/683,293
• Publication Number:
  US 20080083929A1
• Time in Patent Office: 1,161 Days
• Field of Search: 257/59, 257/72, 257/88, 257/99, 257/536, 257/E33.056, 257/E33.057, 438/26
• US Class Current: 257/99
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H05B 45/00 Circuit arrangements for operating light-emitting diodes [LED]
• CPC Class Codes: H05B 45/395 Linear regulators
• CPC Class Codes: H05B 45/40 Details of LED load circuits
• CPC Class Codes: H05B 45/42 Antiparallel configurations
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A highly reliable, high voltage AC/DC LED device with integrated protection mechanism is disclosed. The protection element can be a current-limiting resistor, monolithically integrated on LED chip, or a discrete resistor assembled in the lamp package or submount. The protection elements may also include other parts integrated on a submount.

Claims

1. An illumination device including

a plurality of LED devices on a semiconductor chip, said semiconductor chip having:

(i) a buffer layer above a substrate;

(ii) a doped n-type layer above said buffer layer;

(iii) an active layer above the doped n-type layer; and

(iv) a p-type layer above said active layer;

said buffer layer, doped n-type layer, active layer, and p-type layer being etched away from areas between said LED devices to define said plurality;

a first group of LEDs in a first current path;

a second group of LEDs in a second current path; and

a protection element monolithically integrated into said chip, said protection element comprised of an unetched portion of material in an area between said LEDs, said unetched portion being formed from one of or a combination of the buffer, doped n-type, or p-type layers;

said protection element in electrical connection with said first and second groups of LEDs, said element protecting against at least one of voltage and current overages.

2. The device of claim 1 wherein said element is a resistor.

3. The device of claim 1 wherein said element is of an unremoved portion of the buffer layer in said area.

4. The device of claim 1 wherein said element is comprised of an unremoved portion of the doped n-type layer in said area.

5. The device of claim 1 wherein said element is comprised of an unremoved portion of the p-type layer in said area.

6. The device of claim 1 wherein said semiconductor chip is constructed of materials comprising:

(i) III-Nitride materials GaN, InN, AlN, and their alloys AlGaN, InGaN, AlInN and AlGaInN;

(iii) III-V materials GaAs, InP, AlGaAs, AlGaInP;

(iv) ZnO, SiC;

(v) organic semiconductors;

(vi) organic electroluminescent materials; and

(vii) polymer electroluminescent materials.

7. The device of claim 1 wherein said protection element is one of a plurality of protection elements, each of said plurality of said protection elements being electrically interposed between two of said plurality of LED devices, and the total resistance offered by said plurality of said protection elements protects said plurality of LEDs from excessive amperages.

8. The device of claim 1 wherein said chip has a size of less than about 0.5 mm by 0.5 mm and is, along with said protection element, able to be incorporated into a standard package for indicator-lamp purposes.

9. The device of claim 1, wherein said device is adapted to be operable using one of a 100 VAC, a 120 VAC, and a 220 VAC power source.

10. The device of claim 1 wherein the substrate is made of sapphire, the buffer layer is made of GaN, the doped n-type layer are made of Si-doped GaN, the active layer is a multi-quantum-well structure, and the p-type layer is made of GaN.

11. An illumination device including:

an AC-LED array including a plurality of electrically connected LED devices on a semiconductor chip, said plurality of LED devices including a first group and a second group, the LED devices in said first group being electrically oriented relative to current flow in a direction opposite to a direction in which said second group is biased; and

an integrated protection element included on said chip, said protection element being electrically connected with at least one of said first and second groups of LED devices, said element protecting against one of voltage and current overages.

12. The device of claim 11 wherein said protection element is a bare resistor chip on said semiconductor chip, said bare resistor chip electrically interposed between one of said electrically-connected LED devices and an electrode by conductive elements.

13. The device of claim 11 wherein said protection element is a thin-film resistor between an electrode on said semiconductor chip and one of said LED devices.

14. A method of making an illumination device, said device being adapted for an alternating source of voltage, said method comprising:

creating a preform by;

(i) depositing a buffer layer above a substrate;

(ii) depositing and doping an n-layer above said buffer layer to create a doped n-type layer;

(iii) depositing an active layer above said doped n-type layer; and

(iv) depositing a p-type layer above said active layer;

fabricating a plurality of LED devices on a chip by removing said buffer layer, doped n-type layer, active layer, and p-type layer from portions of said preform to define said plurality;

establishing a first group of LEDs in a first current path and a second group of LEDs in a second current path on said chip to accommodate said alternating source of voltage;

leaving a portion of one of said buffer layer, doped n-type layer, active layer, and p-type layer outside of the defined parameters of said plurality of LED devices to create a protective element;

electrically incorporating said protective element into said first and second flow paths; and

creating a resistance in said element such that said element is sufficient to protect against at least one of voltage and current overages.

15. The method of claim 14 comprising:

forming said portion according to specifications generated by multiplying a resistivity for said semiconductor material by a cross sectional area of said portion and then dividing by a length of said portion.

16. The method of claim 14 wherein said integrating step further comprises:

zigzagging said protective element on said chip in order to increase current travel distance through said element to increase resistivity.

17. An AC-LED system comprising:

a plurality of LEDs serially mounted on a semiconductor chip substrate surface;

said semiconductor chip being flip-mounted onto an upper surface of a submount; and

a protection element located between said substrate surface and said upper surface of the submount, said protection element being serially electrically connected with said plurality of LEDs on said chip using conductive elements provided on the submount.

18. A fabrication process for a light emitting diode (LED) comprising:

creating a preform by;

(i) depositing a buffer layer above a substrate;

(ii) depositing and doping an n-type layer above said buffer layer to create a doped n-type layer;

(iii) depositing an active layer above said n-type layer; and

(iv) depositing a p-type layer above said active layer;

fabricating a plurality of LED devices on a chip by removing said buffer layer, doped n-type layer, active layer, and p-type layer from portions of said preform to define said plurality;

establishing a first group of LEDs in a first current path and a second group of LEDs in a second current path on said chip;

reverse biasing the first group of LEDs relative the second group of LEDs relative to a current direction;

leaving a portion of one of said buffer layer, doped n-type layer, active layer, and p-type layer outside of the defined parameters of at least one of said plurality of LED devices;

electrically incorporating said portion into at least one of said first and second flow paths; and

creating a resistance in said portion such that said portion is sufficient to protect against at least one of voltage and current overages.