Method and apparatus for reducing optical emissions in an integrated circuit

• US 7,716,098 B2
• Filed: 09/17/2004
• Issued: 05/11/2010
• Est. Priority Date: 07/15/1997
• Status: Expired due to Fees

• Current Assignee: Memjet Technology Ltd. (Memjet Limited)
• Original Assignee: Silverbrook Research Pty Limited
• Inventors: Silverbook, Kia, Walmsley, Simon Robert
• Primary Examiner(s): Cheung; Mary
• Assistant Examiner(s): Holly; John H
• Application Number:
  US10/942,858
• Publication Number:
  US 20050038755A1
• Time in Patent Office: 2,062 Days
• Field of Search: 705/1, 705/35, 705/257, 705/713, 705/41, 713/176, 713/179, 356/71, 356/244, 235/380
• US Class Current: 705/35
• CPC Class Codes: B41J 2/14 Structure thereof only for on-demand ink jet heads
• CPC Class Codes: B41J 2/16585 for paper-width or non-reciprocating print heads
• CPC Class Codes: B41J 2/17503 Ink cartridges
• CPC Class Codes: B41J 2/17513 Inner structure
• CPC Class Codes: B41J 2/17596 Ink pumps, ink valves
• CPC Class Codes: B42D 2035/34 Markings visible under particular conditions or containing coded information
• CPC Class Codes: B42D 25/00 Information-bearing cards or sheet-like structures characterised by identification or security features; Manufacture thereof printing processes to produce identification or security features B41M3/14
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G06F 2221/2129 Authenticate client device independently of the user
• CPC Class Codes: G06K 1/121 by printing code marks applying code marks to labels B65C9/46; marking or coding completed packages B65B61/26
• CPC Class Codes: G06K 19/06037 multi-dimensional coding
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 7/14 using light without selection of wavelength, e.g. sensing reflected white light G06K7/10831 - G06K7/1097 take precedence
• CPC Class Codes: G06K 7/1417 2D bar codes
• CPC Class Codes: G06Q 20/3674 involving authentication
• CPC Class Codes: G06Q 40/00 Finance; Insurance; Tax strategies; Processing of corporate or income taxes
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
• CPC Class Codes: G07F 7/08 by coded identity card or credit card or other personal identification means without personal verification means G07F7/02
• CPC Class Codes: G07F 7/086 : by passive credit-cards adapted therefor, e.g. constructive particularities to avoid counterfeiting, e.g. by inclusion of a physical or chemical security-layer for security documents G07D7/00; for the reading of record-carriers in general G06K7/00; for the design of coded credit-cards G06K19/10
• CPC Class Codes: G07F 7/12 : Card verification
• CPC Class Codes: G11C 11/56 : using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: H01L 23/576 : using active circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04L 2209/043 : of tables, e.g. lookup, substitution or mapping
• CPC Class Codes: H04L 2209/20 : Manipulating the length of blocks of bits, e.g. padding or block truncation
• CPC Class Codes: H04L 2209/60 : Digital content management, e.g. content distribution
• CPC Class Codes: H04L 2209/84 : Vehicles
• CPC Class Codes: H04L 9/004 : for fault attacks
• CPC Class Codes: H04L 9/0891 : Revocation or update of secret information, e.g. encryption key update or rekeying
• CPC Class Codes: H04L 9/0897 : involving additional devices, e.g. trusted platform module [TPM], smartcard or USB
• CPC Class Codes: H04L 9/3218 : using proof of knowledge, e.g. Fiat-Shamir, GQ, Schnorr, ornon-interactive zero-knowledge proofs
• CPC Class Codes: H04L 9/3273 : for mutual authentication network architectures or network communication protocols for achieving mutual authentication in a packet data network H04L63/0869
• CPC Class Codes: H04N 23/00 : Cameras or camera modules comprising electronic image sensors; Control thereof
• CPC Class Codes: H04N 5/2628 : Alteration of picture size, shape, position or orientation, e.g. zooming, rotation, rolling, perspective, translation

Abstract

A method of hindering optical detection of a pattern of data being stored, moved or processed by at least one active circuit in an integrated circuit, the active circuit including at least first and second active devices that change state within a period of time, such that each device exhibits low resistance in one state and high resistance in another state, the method comprising controlling timing of the change of state of the first active device relative to the second active device so as to prevent the devices having simultaneous intermediate resistances between the low and high resistances, thereby to reduce optical emission by the at least one active circuit compared to causing the changes of state of the two devices to happen simultaneously.

Claims

1. An integrated circuit including at least one CMOS circuit comprising at least first and second transistors that change state within a period of time and at least one decoy CMOS circuit comprising third transistors, each of the first and second transistors exhibiting low resistance in one state and high resistance in another state, the at least one CMOS circuit being configured such that timing of the change of state of the first transistor relative to the second transistor is controlled so as to prevent the transistors having simultaneous intermediate resistances between the low and high resistances, thereby to reduce optical emission by the at least one CMOS circuit compared to causing the changes of state of the first and second transistors to happen simultaneously,

wherein the third transistors of the decoy CMOS circuit emit light during a change in state, the decoy CMOS circuit being disposed near at least one of the first and second transistors of the CMOS circuit so that light emissions from the decoy CMOS circuit hinder optical detection of a pattern of light emitted by the CMOS circuit.

2. An integrated circuit according to claim 1, wherein first and second clock signals are supplied to the respective first and second transistors, the timing of the change of state of each transistor being dependent on the clock signal supplied to it.

3. An integrated circuit according to claim 2, wherein the second clock signal is configured to rise and fall, or fall and rise, within between adjacent rises and falls of the first clock signal.

4. An integrated circuit according to claim 3, including selecting relative timing of the first and second clock signals such that there is substantially no overlap in clock state transitions thereof.

5. An integrated circuit according to claim 1, wherein the at least one CMOS circuit is an inverter.

6. An integrated circuit according to claim 1, wherein the first transistor is a nMOS transistor and the second transistor is a pMOS transistor.

7. An integrated circuit according to claim 1, wherein the integrated circuit is an authentication chip.