Direct memory access controller with encryption and decryption for non-blocking high bandwidth I/O transactions
DCFirst Claim
1. A computer-enabled method for data processing enhanced DMA data transfers to or from a memory, the method comprising:
- performing a DMA data transfer using one or more DMA engines;
determining one or more DPC hit signals;
performing data processing using one or more DPC channels in response to said determining one or more DPC hit signals;
configuring the one or more DMA engines according to one or more DMA descriptor tables; and
configuring the one or more DPC channels according to one or more DPC descriptor tables;
reading a DPC Enable and a DPC Index from the one or more DMA descriptor tables;
using the DPC Enable to determine whether to perform data processing; and
using the DPC Index to determine if a DPC Channel is assigned.
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Abstract
Due to the integration of multiple I/O device controllers in a storage controller and the need to provide secure and fast data transfers between the I/O devices and the storage controller, an architecture that can perform multiple encrypt/decrypt operations simultaneously is therefore needed to service multiple transfer requests without a negative impact on the speed of transfer and processing. The present invention relates to enhancing Direct Memory Access (DMA) operations between multiple IO devices and a storage controller by adding a Data Processing Core. Exemplary implementations are provided to illustrate the background mechanism used by a DMA controller that minimizes central-processing-unit (CPU) intervention and the multi-channel architecture which allows multiple IO requests to be serviced simultaneously.
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Citations
23 Claims
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1. A computer-enabled method for data processing enhanced DMA data transfers to or from a memory, the method comprising:
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performing a DMA data transfer using one or more DMA engines; determining one or more DPC hit signals; performing data processing using one or more DPC channels in response to said determining one or more DPC hit signals; configuring the one or more DMA engines according to one or more DMA descriptor tables; and configuring the one or more DPC channels according to one or more DPC descriptor tables; reading a DPC Enable and a DPC Index from the one or more DMA descriptor tables; using the DPC Enable to determine whether to perform data processing; and using the DPC Index to determine if a DPC Channel is assigned. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A computer-enabled method for data processing enhanced DMA data transfers to or from a memory, the method comprising the steps of:
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performing a DMA data transfer using one or more DMA engines; determining one or more DPC hit signals; performing data processing using one or more DPC channels in response to the determining of one or more DPC hit signals; configuring the one or more DMA engines according to one or more DMA descriptor tables; configuring the one or more DPC channels according to one or more DPC descriptor tables; obtaining a DPC Setting from the one or more DPC descriptor tables; and wherein one or more encryption algorithms, one or more encryption key sizes and one or more cipher modes to be used by one or more DPC Engines for data processing is determined. - View Dependent Claims (8, 9)
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10. A computer-enabled apparatus for data processing enhanced DMA data transfers to or from a memory, comprising:
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a means for performing DMA data transfers, said means for performing DMA transfers disposed to use one or more DMA engines; a means for performing data processing, said means for performing data processing disposed to use one or more DPC channels and to respond to one or more DPC hit signals; a processing device disposed to configure one or more DMA engines according to one or more DMA descriptor tables; said processing device further disposed to configure one or more DPC channels according to one or more DPC descriptor tables; wherein the one or more DMA descriptor tables comprises a DPC Enable and a DPC Index; wherein the means for performing data processing is further disposed to use the DPC Enable to determine whether to perform data processing; and wherein the means for performing data processing is further disposed to use the DPC Index to determine which of the one or more DPC Channels are assigned. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A computer-enabled apparatus for data processing enhanced DMA data transfers to or from a memory, comprising:
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a means for performing DMA data transfers, said means for performing DMA transfers disposed to use one or more DMA engines; a means for performing data processing, said means for performing data processing disposed to use one or more DPC channels and to respond to one or more DPC hit signals; a processing device disposed to configure one or more DMA engines according to one or more DMA descriptor tables; said processing device further disposed to configure one or more DPC channels according to one or more DPC descriptor tables; wherein the one or more DPC descriptor tables comprises a DPC Setting; and the DPC Setting including information that specifies at least one encryption algorithm, at least one encryption key size, and at least one cipher mode to be used by at least one DPC Engine for data processing. - View Dependent Claims (18)
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19. A direct memory access controller for transferring data to or from a memory, and for encrypting or decrypting said data upon receiving a data processing request, the direct memory access controller comprising:
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a means for performing a DMA data transfer, said means for performing a DMA data transfer including at least one DMA engine configured for transferring data; a means for performing data processing coupled to said means for performing a DMA data transfer, said data processing includes encrypting or decrypting said data in response to a DPC hit signal by at least using a DPC channel to intercept said data, causing said data to be transferred to said means for performing data processing. - View Dependent Claims (20, 21, 22, 23)
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Specification