Hybrid memory device with single interface
First Claim
1. In a memory device, a method for handling data operations at a single interface and for at least two types of memory without any changes to the physical memory device, comprising:
- receiving, at a controller, commands, addresses and data at the memory device via an interface associated with the memory device, the memory device including at least a first type of memory and a second type of memory, wherein the interface is defined for the first type of memory and the memory device includes only software changes with respect to a memory device having only the first type of memory, such that no physical changes are needed to the memory device to handle the first type of memory and the second type of memory;
determining, at the controller, whether information received at the memory device corresponds to the first type of memory associated with the memory device, and when it does, outputting signals to the first type of memory to communicate at least one command to the first type of memory; and
determining, at the controller, whether information received at the memory device corresponds to the second type of memory associated with the memory device, and when it does, outputting signals to the second type of memory to communicate at least one command to the second type of memory.
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Accused Products
Abstract
Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access protocols defined for one type of memory. For example, the controller allows a memory device with a standard SDRAM interface to provide access to both SDRAM and non-volatile memory with the non-volatile memory overlaid in one or more designated blocks of the volatile memory address space (or vice-versa). A command protocol maps memory pages to the volatile memory interface address space, for example, permitting a single pin compatible multi-chip package to replace an existing volatile memory device in any computing device that wants to provide non-volatile storage, while only requiring software changes to the device to access the flash.
183 Citations
17 Claims
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1. In a memory device, a method for handling data operations at a single interface and for at least two types of memory without any changes to the physical memory device, comprising:
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receiving, at a controller, commands, addresses and data at the memory device via an interface associated with the memory device, the memory device including at least a first type of memory and a second type of memory, wherein the interface is defined for the first type of memory and the memory device includes only software changes with respect to a memory device having only the first type of memory, such that no physical changes are needed to the memory device to handle the first type of memory and the second type of memory; determining, at the controller, whether information received at the memory device corresponds to the first type of memory associated with the memory device, and when it does, outputting signals to the first type of memory to communicate at least one command to the first type of memory; and determining, at the controller, whether information received at the memory device corresponds to the second type of memory associated with the memory device, and when it does, outputting signals to the second type of memory to communicate at least one command to the second type of memory. - View Dependent Claims (2, 3, 4, 5)
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6. In a memory device, a system comprising:
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a first type of memory; a second type of memory, wherein the first and second types of memory are hardware-type memory; an interface corresponding to the first type of memory such that the memory device operates with the access protocol of the first type of memory, and such that only software changes are necessary to operate the interface with both the first type of memory and the second type of memory, and without any physical changes to the memory device relative to a memory device having only the first type of memory; and a controller that is coupled to the interface, to the first type of memory and to the second type of memory, in which based on information received at the interface, the controller determines whether other information received via the interface applies to the first type of memory or the second type of memory. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13)
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14. In a computing device, a system comprising:
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a central processing unit (CPU); a hybrid memory device including; DRAM-based memory; flash-type memory having a speed less than a speed of the DRAM-based memory; firmware; physical architecture which includes only the firmware changes relative to a memory device having only DRAM-based memory, such that no physical changes are made to accommodate the flash-type memory in the hybrid device; an interface corresponding to the DRAM-based memory; and a controller having a speed-matching buffer set of at least the speed of the DRAM-based memory; a component that; initiates input/output (I/O) operations to the controller via the interface, including by writing I/O related data to one or more addresses of the DRAM-based memory; causes the controller to map the one or more addresses of the DRAM-based memory to the flash-type memory, thereby indicating that the I/O related data is to be used on the flash-type memory; cause the controller to set a status to busy, the status indicating a busy status of the controller to the firmware; filling the speed-matching buffer set with data; when the speed-matching buffer set has sufficient data to compensate for differences in speed in the DRAM-based memory, setting the status to ready; and when the firmware polls for status and determines the status is set to ready, outputting the data from the speed-matching buffer set, wherein the CPU is unaware the firmware polls for the status. - View Dependent Claims (15, 16, 17)
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Specification