Memory with cell population distribution assisted read margining
First Claim
Patent Images
1. A memory device comprising:
- a array of memory cells each storing one of at least two data states;
read circuitry connectable to the array to evaluate the memory cells at a first reference condition and at a plurality of secondary reference conditions; and
logic and control circuitry connectable to the read circuitry to establish a read condition at which to establish the memory cells that contain data corresponding to a selected one of the data states based on comparing the number of memory cells evaluated at the first reference condition and at the second reference conditions, wherein the read condition is established based on the rate of change of number of memory cells evaluated at the plurality of reference conditions.
3 Assignments
0 Petitions
Accused Products
Abstract
A memory using techniques to extract the data content of its storage elements, when the distribution of stored states is degraded, is presented. If the distribution of stored states has degraded, secondary evaluations of the memory cells are performed using modified read conditions. Based upon the results of these supplemental evaluations, the memory device determines the read conditions at which to best decide the data stored.
-
Citations
34 Claims
-
1. A memory device comprising:
-
a array of memory cells each storing one of at least two data states; read circuitry connectable to the array to evaluate the memory cells at a first reference condition and at a plurality of secondary reference conditions; and logic and control circuitry connectable to the read circuitry to establish a read condition at which to establish the memory cells that contain data corresponding to a selected one of the data states based on comparing the number of memory cells evaluated at the first reference condition and at the second reference conditions, wherein the read condition is established based on the rate of change of number of memory cells evaluated at the plurality of reference conditions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
-
-
18. A memory device comprising:
-
a memory array having a plurality of memory cells; read circuitry connectable to the memory array to evaluate the memory cells using standard read conditions and a plurality of secondary read conditions; and control and logic circuitry connectable to the read circuitry to determine whether an evaluation using standard read conditions has an unacceptable level of error and, in response to the evaluation using standard read conditions having an unacceptable level of error, to perform evaluations of the memory cells using a plurality of secondary read conditions, extract information on the distribution of programmed state populations of the memory cells based on the results of the evaluations using the standard read conditions and the plurality of secondary read conditions, and establish modified read conditions differing from the standard read conditions at which to evaluate the memory cells to determine their data content based on said information on the distribution of programmed state populations. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
-
Specification