Enhanced reliability semiconductor package

• US 7,719,108 B2
• Filed: 01/10/2005
• Issued: 05/18/2010
• Est. Priority Date: 01/10/2005
• Status: Active Grant

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Shields, Richard, Vos, David L., Riegle, Ryan S., Murphy, William E.
• Primary Examiner(s): Ward; Jessica L
• Assistant Examiner(s): Saad; Erin B
• Application Number:
  US11/032,526
• Publication Number:
  US 20060151581A1
• Time in Patent Office: 1,954 Days
• Field of Search: 361/675, 361/706, 361/705, 438/108, 257/706, 257/707, 257/710, 257/712, 257/713, 257/720, 257/783, 228/123.1, 228/122.1, 228/121, 228/120
• US Class Current: 257/706
• CPC Class Codes: B23K 1/0016 Brazing of electronic components
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H05K 1/0209 External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10969 Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 3/341 Surface mounted components
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of packaging a semiconductor component with a printed wiring board is disclosed. The method includes determining a first distance, applying a thin film onto a surface of the semiconductor component such that the thin film is spaced apart from a support of the semiconductor, applying a solder pad onto the printed wiring board, placing the semiconductor component with the thin film onto the printed wiring board, and positioning the thin film adjacent the solder pad.

Claims

1. A component package comprising:

a semiconductor component having a monolithic substrate and a plurality of supports;

a thermally conductive thin film not contacting the plurality of supports and having first and second surfaces, the first surface being cured on the monolithic substrate of the semiconductor component, the second surface being opposite the first surface; and

a printed wiring board having a solder pad thereon, a first surface of the solder pad being adjacent the printed wiring board and a second surface of the solder pad being opposite the first surface of the solder pad, the semiconductor component being mounted on the printed wiring board, and the second surface of the thin film being positioned adjacent the second surface of the solder pad;

wherein a portion of the monolithic substrate facing the printed wiring board is in a direct mechanical bond with the thin film, the second surface of the thin film is in a direct mechanical bond with the second surface of the solder pad, and the solder pad is in a direct mechanical bond with the printed wiring board to provide mechanical bonding and a thermal path between the monolithic substrate and the printed wiring board.

2. The package of claim 1, wherein the semiconductor component comprises at least one of a thin small-area outline package (“

TSOP”

) and a ball grid array (“

BGA”

) package.

3. The package of claim 1, wherein the thin film comprises a plurality of thermally conductive particles.

4. The package of claim 3, wherein the plurality of thermally conductive particles comprises a metal.

5. The package of claim 1, wherein the positioned solder pad further comprises at least one of a reflowed solder pad, and a solder pad physically connected to the thin film.

6. The package of claim 1, wherein the solder pad comprises at least one of tin, tin bismuth, and tin lead.

7. The package of claim 1, wherein the monolithic substrate facing the printed wiring board comprises at least one of ceramic, plastic, silicon, and carbon composites.

8. The package of claim 1, wherein the printed wiring board comprises a plurality of thermally conductive particles thereon.

9. The package of claim 1, and wherein a melting point of the thin film is greater than a second melting point of the solder pad.

10. The package of claim 1, wherein the plurality of supports have a first coefficient of thermal expansion, wherein the solder pad also has a second coefficient of thermal expansion, and wherein the second coefficient of thermal expansion and the first coefficient of thermal expansion are substantially equal.

11. The package of claim 1, wherein the plurality of supports have a first coefficient of thermal expansion, wherein the solder pad also has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is equal to or greater than the second coefficient of thermal expansion.

12. The package of claim 1, wherein the solder pad has a solder pad thickness, wherein the thin film has a thin film thickness, and wherein the thin film thickness is less than the solder pad thickness.

13. The package of claim 1, wherein the plurality of supports include a solder ball.

14. The package of claim 1 wherein the plurality of supports include a metal.

15. The package of claim 1, wherein the plurality of supports are thermally conductive.

16. The package of claim 1, wherein the plurality of supports are in thermal contact with the printed wiring board.

17. The package of claim 3, wherein the thermally conductive particles are arranged randomly.

18. The package of claim 1, wherein the printed wiring board has at least one surface, wherein the support has a thickness, and wherein a gap distance between the monolithic substrate and the at least one surface of the printed wiring board is approximately equal to the thickness of the support.

19. The package of claim 1, wherein the solder pad is configured to dissipate heat.

20. The package of claim 1, wherein the solder pad and thin film have planar dimensions, and wherein the planar dimensions of the solder pad generally match the planar dimensions of the thin film.

21. The package of claim 1, wherein the solder pad includes a solder mask.

22. The package of claim 3, wherein a thermal path is established between the thermally conductive particles and the solder pad.

23. The package of claim 3, wherein a thermal path is established by direct contact between the thermally conductive particles and the solder pad.

24. The package of claim 1, wherein the plurality of supports have a first coefficient of thermal expansion, wherein the solder pad also has a second coefficient of thermal expansion, and wherein the second coefficient of thermal expansion is equal to or greater than the first coefficient of thermal expansion.

25. The package of claim 1, wherein the printed wiring board comprises at least one of epoxy, glass, polymide, flex tape, ceramic, and silicon.