Low emission signal generator and distributor system

• US 7,720,170 B2
• Filed: 11/06/2006
• Issued: 05/18/2010
• Est. Priority Date: 12/13/2005
• Status: Expired due to Fees

• Current Assignee: AWQ Consulting Incorporated
• Original Assignee: AWQ Consulting Incorporated
• Inventors: Bayramoglu, Gokalp
• Primary Examiner(s): Fan; Chieh M
• Assistant Examiner(s): Lee; Siu M
• Application Number:
  US11/592,873
• Publication Number:
  US 20070133999A1
• Time in Patent Office: 1,289 Days
• Field of Search: 375/285, 375/240, 375/239, 375/238, 375/295, 375/316, 375/340, 375/342
• US Class Current: 375/285
• CPC Class Codes: H04B 15/04 the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
• CPC Class Codes: H04B 2215/064 Reduction of clock or synthesizer reference frequency harmonics
• CPC Class Codes: H04B 2215/067 by modulation dispersion
• CPC Class Codes: H04L 7/0008 Synchronisation information channels, e.g. clock distribution lines

Abstract

A low emission signal manipulating circuit for reducing emission of a given signal. This is accomplished by manupulating the signal and recovering the original signal. The inventive device includes a transmitter which modifies a given signal, a divider that resides in transmitter which divides the incoming signal, a pulse shaping circuit which generates two pulses one at the leading edge and one at the trailing edge of the incoming signal, a receiver which recovers the original signal from the modified signal, a register which generates a signal based on incoming pulses, a phase locked loop circuit that generates a signal at the output. Transmitter has a divider circuit that divides the incoming signal. It also has pulse circuits where two pulses are generated. Divider has five flip flops that divides the incoming signal'"'"'s frequency by a predetermined amount. Pulse shaping circuit has two integrators and logic gates. Receiver has a register circuit and phase locked loop. Register has a flip flop. Phase Locked Loop has a phase comparator, charge pump, voltage controlled oscillator and a divider.

Claims

1. An integrated circuit system for reducing an electromagnetic radiation from a circuit board comprising:

a transmitter for accepting an input signal and converting said input signal to an output signal that has a lower electromagnetic emission than said input signal, said transmitter comprises;

a frequency divider for dividing said input signal by a number therefore generating an intermediate signal with lower frequency;

wherein said number can be fixed or programmable;

wherein said intermediate signal has pulses and each pulse has a leading edge and a trailing edge;

a pulse shaper for generating the output signal having a first pulse at said leading edge of said intermediate signal and a second pulse at said trailing edge of said intermediate signal, said pulse shaper comprises;

a first integrator for integrating the intermediate signal and output a first integrated signal;

a first logic accepts the first integrated signal and the intermediate signal to generate a first logic signal;

a second integrator for integrating the intermediate signal and output a second integrated signal;

a second logic accepts the second integrated signal and the intermediate signal to generate a second logic signal;

a third logic accepts the first and second logic signal to generate the output signal;

wherein said first pulse has a first pulse duration and said second pulse has a second pulse duration;

wherein said integrators are programmable to adjust said first pulse duration and said second pulse duration;

wherein said integrators generate said output signal that has plurality of said first and said second pulses therefore spreading the energy in said output signal to reduce said electromagnetic emission;

a receiver for receiving said output signal from said transmitter and generating a signal from said output signal which has substantially same frequency as said input signal.

2. A system in accordance with claim 1, wherein said transmitter is implemented as a standalone integrated circuit.

3. A system in accordance with claim 1, wherein said transmitter is implemented in a larger integrated circuit.

4. A system in accordance with claim 1, wherein said frequency divider is programmable for changing said number for changing said intermediate signal frequency.

5. A system in accordance with claim 1, wherein said receiver further comprises:

a register circuit for increasing the duration of said output signal; and

a phase locked loop to generate a signal which has substantially same frequency and pulse width as said input signal.

6. A system in accordance with claim 1, wherein said receiver is implemented as a standalone integrated circuit.

7. A system in accordance with claim 1, wherein said receiver is implemented in a larger integrated circuit.

8. An integrated circuit system comprising:

a transmitter receiving an input signal having input energy and input frequency, the transmitter comprises;

means for reducing the frequency of said input signal and generate an intermediate signal;

wherein said input signal has plurality of input pulses;

wherein each said input pulse has an input pulse duration;

pulse shaping means for generating an output signal from said intermediate signal;

wherein said pulse shaping means comprises;

a first integrator for integrating the intermediate signal and output a first integrated signal;

a first logic accepts the first integrated signal and the intermediate signal to generate a first logic signal;

a second integrator for integrating the intermediate signal and output a second integrated signal;

a second logic accepts the second integrated signal and the intermediate signal to generate a second logic signal;

a third logic accepts the first and second logic signals to generate the output signal having a first pulse at each leading edges of said intermediate signal a second pulse at each trailing edges of said intermediate signal;

wherein said output signal has an output energy;

wherein said output signal has an output frequency;

wherein said output signal has plurality of output pulses;

wherein each said output pulse has a programmable output pulse duration;

wherein said output pulse duration is shorter than said input pulse duration therefore spreading energy of said input signal and generate said output signal that has lower electromagnetic radiation;

a receiver receives said output signal of said transmitter after traveling on a circuit board;

said receiver comprises;

means for increasing said output pulse duration of said output signal;

means for multiplying said output frequency of said output signal with said number used in said transmitter;

means for generating a signal with plurality of pulses and a frequency;

wherein each of said pulses has a pulse duration;

wherein said pulse duration is substantially equal to said input pulse duration;

wherein said frequency is substantially equal to said input frequency.

9. A system in accordance with claim 8, wherein said receiver comprises a PLL circuit for generating said input signal from the said output signal.