Stacked film patterning method and gate electrode forming method
First Claim
1. A stacked film patterning method for obtaining a desired stacked film pattern by etching a stacked film comprising a lower layer film made of a conductive semiconductor and an upper layer film made of metal, said method comprising:
- a first etching process of removing a specified region of said upper layer film made of said metal by using a wet-etching method;
a second etching process, following said first etching process, of removing residues of said metal not removed by said first etching process or a compound of said metal with said conductive semiconductor by using plasma of a mixed gas comprising chlorine gas and oxygen gas after completion of said first etching process; and
a third etching process, following said second etching process, of removing said lower layer film made of said conductive semiconductor by using a dry-etching method after completion of said second etching process, wherein said conductive semiconductor is selected from the group consisting of micro-crystal silicon, polycrystalline silicon, amorphous silicon, and germanium polycrystalline silicon.
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Abstract
A stacked film patterning method is provided which is capable of reliably removing residual substances remaining after etching of a metal film, improving etching uniformity of a silicon film, and preventing an occurrence of etching residues. A micro-crystal film and a chromium film are sequentially formed on an insulating film serving as a front-end film and the chromium film is etched to be patterned by using a resist as a mask. Next, a micro-crystal silicon film on which the residual substances exist is exposed to plasma of a mixed gas including chlorine gas and oxygen gas to selectively etch the residual substances on a surface of the micro-crystal silicon film. After that, the micro-crystal silicon film is dry etched.
178 Citations
7 Claims
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1. A stacked film patterning method for obtaining a desired stacked film pattern by etching a stacked film comprising a lower layer film made of a conductive semiconductor and an upper layer film made of metal, said method comprising:
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a first etching process of removing a specified region of said upper layer film made of said metal by using a wet-etching method; a second etching process, following said first etching process, of removing residues of said metal not removed by said first etching process or a compound of said metal with said conductive semiconductor by using plasma of a mixed gas comprising chlorine gas and oxygen gas after completion of said first etching process; and a third etching process, following said second etching process, of removing said lower layer film made of said conductive semiconductor by using a dry-etching method after completion of said second etching process, wherein said conductive semiconductor is selected from the group consisting of micro-crystal silicon, polycrystalline silicon, amorphous silicon, and germanium polycrystalline silicon. - View Dependent Claims (2, 3, 4, 5)
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6. A gate electrode forming method for obtaining a desired gate electrode pattern by forming a stacked film comprising a lower layer film made of a conductive semiconductor and an upper layer film made of metal on a semiconductor film and gate insulating film deposited sequentially on a substrate and by etching said stacked film, said method comprising:
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a first etching process of removing a specified region of said upper layer film made of said metal by using a wet-etching method; a second etching process, following said first etching process, of removing residues of said metal or a compound of said metal not removed by said first etching process with said conductive semiconductor by using plasma of a mixed gas comprising chlorine gas and oxygen gas after completion of said first etching process; and a third etching process, following said second etching process, of removing said lower layer film made of said conductive semiconductor by using a dry-etching method after completion of said second etching process, wherein said conductive semiconductor is selected from the group consisting of micro-crystal silicon, polycrystalline silicon, amorphous silicon and germanium polycrystalline silicon. - View Dependent Claims (7)
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Specification