Carrier layer for a semiconductor layer sequence and method for producing semiconductor chips

• US 7,723,730 B2
• Filed: 11/29/2004
• Issued: 05/25/2010
• Est. Priority Date: 11/28/2003
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Groetsch, Stefan, Ploessl, Andreas, Hahn, Berthold, Illek, Stefan
• Primary Examiner(s): Mandala; Victor A
• Application Number:
  US10/999,854
• Publication Number:
  US 20050127382A1
• Time in Patent Office: 2,003 Days
• Field of Search: 257/79, 257/99, 257/774, 257/E33.001, 257/E33.066, 257/E33.075
• US Class Current: 257/79
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2224/83048 Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01032 Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01042 Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 33/007 : comprising nitride compounds
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/641 : characterized by the materials
• CPC Class Codes: H01L 33/647 : the elements conducting electric current to or from the semiconductor body

Abstract

A carrier layer (1) for a semiconductor layer sequence comprising an electrical insulation layer (2) containing AlN or a ceramic. Furthermore a method for producing semiconductor chips is described.

Claims

1. A semiconductor chip comprising:

an epitaxial semiconductor chip region and a chip carrier, the semiconductor chip region being arranged on the chip carrier,

wherein the semiconductor chip is free of a growth substrate for the epitaxial semiconductor chip region;

the chip carrier comprises an electrical insulation layer, and

the electrical insulation layer contains at least one of AlN and a ceramic.

2. The semiconductor chip as claimed in claim 1, wherein the electrical insulation layer contains an AlN ceramic.

3. The semiconductor chip as claimed in claim 1, wherein the electrical insulation layer is formed in self-supporting fashion.

4. The semiconductor chip as claimed in claim 1, wherein the chip carrier has a conductor structure that comprises an electrical conductor material.

5. The semiconductor chip as claimed in claim 4, wherein the chip carrier has a first main area facing the semiconductor chip region and a second main area facing away from the semiconductor chip region, and the conductor structure extends from the first main area to the second main area.

6. The semiconductor chip as claimed in claim 5, wherein the conductor structure is at least partly formed in cutouts of the electrical insulation layer that extend from the first main area to reach the second main area of the chip carrier.

7. The semiconductor chip as claimed in claim 4, wherein the semiconductor chip region is electrically conductively connected to the conductor structure.

8. The semiconductor chip as claimed in claim 4, wherein the electrical conductor material is one of a metal and an alloy.

9. The semiconductor chip as claimed in claim 8, wherein the electrical conductor material is at least one of W, Ag, Au and Cu, or an alloy having at least one of W, Ag, Au and Cu.

10. The semiconductor chip as claimed in claim 4, wherein the conductor structure comprises a thermally conductive substance for increasing the thermal conductivity of the conductor structure.

11. The semiconductor chip as claimed in claim 1, wherein the semiconductor chip region has a radiation-generating active zone.

12. The semiconductor chip as claimed in claim 11, wherein a mirror layer is arranged downstream of the active zone.

13. The semiconductor chip as claimed in claim 12, wherein the mirror layer is electrically conductively connected to the semiconductor chip region.

14. The semiconductor chip as claimed in claim 12, wherein the mirror layer is arranged between the first main area of the chip carrier and the active zone.

15. The semiconductor chip as claimed in claim 1, wherein the semiconductor chip region is formed for an LED chip or a radiation-emitting component with a resonator.

16. The semiconductor chip as claimed in claim 1, wherein the semiconductor chip region contains at least one III-V semiconductor material, comprising In_xGa_yAl₁₋

x−

yP, In_xGa_yAl<sub>1−

x−

y</sub>N or In_xGa_yAl<sub>1−

x−

y</sub>As, in each case where 0≦

x≦

1, 0≦

y≦

1 and x+y≦

1.

17. The semiconductor chip as claimed in claim 1, wherein the chip carrier has a coefficient of thermal expansion which matches a coefficient of thermal expansion of the semiconductor chip region.

18. The semiconductor chip as claimed in claim 1, wherein the chip carrier has a thermal conductivity higher than 195 W/mK.

19. The semiconductor chip as claimed in claim 18, wherein the thermal conductivity of the chip caffier is 230 W/mK.

20. The semiconductor chip as claimed in claim 10, wherein the electrical conductor material has a first thermal conductivity, and the thermally conductive substance has a second thermal conductivity which is higher than the first thermal conductivity.

21. The semiconductor chip as claimed in claim 15, wherein the radiation-emitting component with a resonator is an edge-emitting laser or a vertically emitting component.

22. The semiconductor chip as claimed in claim 21, wherein the vertically emitting component is a VCSEL, a VECSEL or an RCLED.

23. The semiconductor chip as claimed in claim 12, wherein the semiconductor chip region is fixed on the chip carrier by means of an electrically conductive connecting layer which is arranged between the mirror layer and the chip carrier.

24. The semiconductor chip as claimed in claim 23, wherein the connecting layer is formed by a solder, by eutectic bonding or by adhesive bonding.

25. The semiconductor chip as claimed in claim 1, wherein the semiconductor chip region comprises a plurality of semiconductor layers grown epitaxially on a growth substrate, the growth substrate being removed from the semiconductor layers after the semiconductor layers have been grown epitaxially.

26. The semiconductor chip as claimed in claim 12, wherein the mirror layer comprises a metal layer.

27. A carrier layer for a semiconductor layer sequence, the carrier layer comprising:

a first main area facing the semiconductor layer sequence;

a second main area opposite to the first main area and facing away from the semiconductor layer sequence;

an electrical insulation layer containing a ceramic and having cutouts therethrough; and

conductor structures at least partly formed in the respective cutouts and extending from the first main area to reach the second main area,

wherein each of the conductor structures comprises an electrical conductor material and a thermally conductive substance, the thermally conductive substance having a higher thermal conductivity than the electrical conductor material and being introduced into said conductor structures as particles.

28. The carrier layer as claimed in claim 27, wherein the particles are diamond particles.