Nonvolatile semiconductor storage device and manufacturing method thereof

• US 7,723,773 B2
• Filed: 02/05/2007
• Issued: 05/25/2010
• Est. Priority Date: 02/10/2006
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Lee; Eugene
• Application Number:
  US11/702,201
• Publication Number:
  US 20070200167A1
• Time in Patent Office: 1,205 Days
• Field of Search: 257/314, 257/315, 257/347, 257/616, 257/E21.209
• US Class Current: 257/314
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/44 with a control gate layer also being used as part of the peripheral transistor
• CPC Class Codes: H10B 41/46 with an inter-gate dielectric layer also being used as part of the peripheral transistor
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An object of the present invention is to provide a nonvolatile semiconductor storage device with a superior charge holding characteristic in which highly-efficient writing is possible at low voltage, and to provide a manufacturing method thereof.

The nonvolatile semiconductor storage device includes a semiconductor film having a pair of impurity regions formed apart from each other and a channel formation region provided between the impurity regions; and a first insulating film, a charge accumulating layer, a second insulating film, and a conductive film functioning as a gate electrode layer which are provided over the channel formation region. In the nonvolatile semiconductor storage device, a second barrier formed by the first insulating film against a charge of the charge accumulating layer is higher in energy than a first barrier formed by the first insulating film against a charge of the semiconductor film.

Claims

1. A nonvolatile semiconductor storage device comprising:

a substrate having an insulating surface;

a storage element included in a memory portion comprising;

a first semiconductor film over the substrate, having a pair of first impurity regions formed apart from each other and a first channel formation region provided between the pair of first impurity regions;

a first insulating film provided over the first channel formation region;

a charge accumulating layer provided over the first insulating film;

a second insulating film provided over the charge accumulating layer; and

a first gate electrode layer provided over the second insulating film;

an element included in a logic portion comprising;

a second semiconductor film over the substrate, having a pair of second impurity regions formed apart from each other and a second channel formation region provided between the pair of second impurity regions;

a third insulating film provided over the second channel forming region; and

a second gate electrode layer provided over the third insulating film,

wherein a first energy barrier is formed by the first insulating film against a charge of the first semiconductor film,

wherein a second energy barrier is formed by the first insulating film against a charge of the charge accumulating layer,

wherein the second energy barrier is higher than the first energy barrier,

wherein the first insulating film and the third insulating film are different material, and

wherein the first gate electrode layer and the second gate electrode layer are the same material.

2. The nonvolatile semiconductor storage device according to claim 1,

wherein the charge accumulating layer comprises germanium as a main component.

3. The nonvolatile semiconductor storage device according to claim 1,

wherein the first gate electrode layer and the second gate electrode layer are conductive films each including a nitrogen atom.

4. A nonvolatile semiconductor storage device comprising:

a substrate having an insulating surface;

a storage element included in a memory portion comprising;

a first semiconductor film over the substrate, having a pair of first impurity regions formed apart from each other and a first channel formation region provided between the pair of first impurity regions;

a first insulating film provided over the first channel formation region;

a charge accumulating layer provided over the first insulating film;

a second insulating film provided over the charge accumulating layer; and

a first gate electrode layer provided over the second insulating film;

an element included in a logic portion comprising;

a second semiconductor film over the substrate, having a pair of second impurity regions formed apart from each other and a second channel formation region provided between the pair of second impurity regions;

a third insulating film provided over the second channel forming region; and

a second gate electrode layer provided over the third insulating film,

wherein the charge accumulating layer comprises a material with a smaller energy gap than the first semiconductor film,

wherein the first insulating film and the third insulating film are different material, and

wherein the first pate electrode layer and the second gate electrode layer are the same material.

5. The nonvolatile semiconductor storage device according to claim 4,

wherein the charge accumulating layer comprises germanium as a main component.

6. The nonvolatile semiconductor storage device according to claim 4,

wherein the first gate electrode layer and the second gate electrode layer are conductive films each including a nitrogen atom.

7. A nonvolatile semiconductor storage device comprising:

a substrate having an insulating surface;

a storage element included in a memory portion comprising;

a first semiconductor film formed over the substrate, having a pair of impurity regions formed apart from each other and a channel formation region provided between the pair of impurity regions;

a first insulating film provided over the channel formation region;

a charge accumulating layer comprises germanium, provided over the first insulating film;

a second insulating film provided over the charge accumulating layer; and

a first gate electrode layer provided over the second insulating film;

an element included in a logic portion comprising;

a second semiconductor film over the substrate, having a pair of second impurity regions formed apart from each other and a second channel formation region provided between the pair of second impurity regions;

a third insulating film provided over the second channel forming region; and

a second gate electrode layer provided over the third insulating film,

wherein the first insulating film and the third insulating film are different material, and

wherein the first gate electrode layer and the second gate electrode layer are the same material.

8. The nonvolatile semiconductor storage device according to claim 7 wherein the first insulating film comprises:

an oxide film; and

a film including oxygen and nitrogen over the oxide film.

9. The nonvolatile semiconductor storage device according to claim 7 wherein the charge accumulating layer further comprises nitrogen.

10. The nonvolatile semiconductor storage device according to claim 7 wherein a surface of the second insulating film is oxidized.

11. The nonvolatile semiconductor storage device according to claim 7 wherein the semiconductor film further has a low-concentration impurity region between the impurity region and the channel formation region.