Active material and light emitting device

• US 7,723,899 B2
• Filed: 12/15/2006
• Issued: 05/25/2010
• Est. Priority Date: 02/03/2004
• Status: Active Grant

• Current Assignee: SC Johnson & Son Incorporated
• Original Assignee: SC Johnson & Son Incorporated
• Inventors: Blandino, Thomas P., Luc, Tai P.
• Primary Examiner(s): Benson; Walter
• Assistant Examiner(s): Rosenau; Derek J
• Application Number:
  US11/639,904
• Publication Number:
  US 20070159422A1
• Time in Patent Office: 1,257 Days
• Field of Search: 310317-319, 315/185.S, 315/200.A, 327/518
• US Class Current: 310/317
• CPC Class Codes: A01M 1/2033 using a fan
• CPC Class Codes: A01M 1/205 using vibrations, e.g. ultrasonic or piezoelectric atomizers
• CPC Class Codes: A01M 1/2077 using an electrical resistance as heat source A01M1/2083 takes precedence
• CPC Class Codes: A61L 2209/12 Lighting means
• CPC Class Codes: A61L 9/03 Apparatus therefor
• CPC Class Codes: A61L 9/14 using sprayed or atomised substances including air-liquid contact processes
• CPC Class Codes: B06B 1/0261 taken from a transducer or electrode connected to the driving transducer
• CPC Class Codes: F21S 6/001 being candle-shaped with varying lighting effect of simulating flames F21S10/04; string of light sources F21S4/00
• CPC Class Codes: F21V 33/0004 Personal or domestic articles
• CPC Class Codes: H05B 45/20 Controlling the colour of the light
• CPC Class Codes: H05B 45/37 Converter circuits
• CPC Class Codes: H05B 47/155 Coordinated control of two or more light sources

Abstract

An active material and light emitting device comprises an ultrasonic atomizer assembly and a light emission device. The active material and light emitting device are operated such that the active material is periodically or aperiodically dispensed and the light emitting device flickers to simulate a real candle.

Claims

1. A light and active material emitting circuit, comprising:

an LED;

a microprocessor that develops a pulse-width modulated (PWM) waveform;

a first feedback circuit coupled to the LED;

an integrator having a first input that receives the PWM waveform, a second input coupled to the first feedback circuit, and an output;

an oscillator coupled to the integrator including a logic gate, a first impedance coupled across the logic gate providing positive feedback and a second impedance coupled across the logic gate providing negative feedback;

a drive circuit coupled to the oscillator;

a first inductor coupled between the driver and the LED wherein the LED is caused to flicker;

a piezoelectric actuator;

a second inductor coupled to the piezoelectric actuator wherein the piezoelectric actuator and the second inductor form a resonant circuit;

a plurality of transistors coupled to the resonant circuit;

a second feedback circuit coupled to the plurality of transistors; and

a control circuit coupled to the second feedback circuit and having an amplifier and an inverter, wherein the control circuit is further coupled to the transistors, and wherein the control circuit develops the drive waveforms such that the piezoelectric actuator is periodically driven at a resonant frequency.

2. The circuit of claim 1, wherein the amplifier is a first NAND gate and the inverter is a second NAND gate, and wherein the first NAND gate includes a first input that receives an enable signal developed by the microprocessor and a second input coupled to the second feedback circuit and the control circuit further includes a capacitor coupled between an output of the second NAND gate and the second input of the first NAND gate and further wherein the first NAND gate includes an output coupled to first and second inputs of the second NAND gate.

3. The circuit of claim 2, wherein the control circuit includes a third NAND gate having a first input coupled to the output of the second NAND gate, a second input that receives the enable signal, and an output coupled to the transistors and wherein a resistor is coupled between the second input of the third NAND gate and ground potential.

4. The circuit of claim 2, wherein two pairs of transistors are connected to the resonant circuit in a full-bridge configuration, and wherein the control circuit includes third and fourth NAND gates, the third NAND gate having a first input coupled to the output of the second NAND gate, a second input that receives the enable signal, and an output coupled to a first pair of the transistors and the fourth NAND gate having a first input coupled to the output of the first NAND gate, a second input that receives the enable signal, and an output coupled to a second pair of the transistors.

5. The circuit of claim 4, wherein a further resistor is coupled between the output and the second input of the first NAND gate.

6. The circuit of claim 5, wherein the feedback circuit includes another resistor that senses current flow through the resonant circuit and a capacitor coupling the other resistor to the first NAND gate.

7. The circuit of claim 1, wherein the oscillator generates a second PWM waveform that is controlled by the output of the integrator, and wherein the output of the integrator is controlled by the feedback circuit and the PWM waveform developed by the microprocessor.

8. A circuit for developing a drive waveform for an LED, comprising:

a microprocessor that develops a pulse-width modulated (PWM) waveform;

a feedback circuit coupled to the LED;

an integrator having a first input that receives the PWM waveform, a second input coupled to the feedback circuit, and an output;

an oscillator coupled to the integrator including a logic gate, a first impedance coupled across the logic gate providing positive feedback and a second impedance coupled across the logic gate providing negative feedback;

a drive circuit coupled to the oscillator; and

an inductor coupled between the drive circuit and the LED wherein the LED is caused to flicker.

9. The circuit of claim 8, further comprising a circuit for developing drive waveforms for switches coupled to a resonant circuit, comprising:

a second feedback circuit coupled to the resonant circuit; and

a control circuit coupled to the second feedback circuit and having first and second interconnected NAND gates, wherein the control circuit is further coupled to the switches and develops the drive waveforms wherein the resonant circuit is driven at a resonant frequency.

10. The circuit of claim 9, wherein the first NAND gate includes a first input that receives an enable signal and a second input coupled to the second feedback circuit and the control circuit further includes a capacitor coupled between an output of the second NAND gate and the second input of the first NAND gate and further wherein the first NAND gate includes an output coupled to first and second inputs of the second NAND gate.

11. The circuit of claim 10, wherein the control circuit includes a third NAND gate having a first input coupled to the output of the second NAND gate, a second input that receives the enable signal, and an output coupled to the switches.

12. The circuit of claim 11, wherein a resistor is coupled between the second input of the third NAND gate and ground potential.

13. The circuit of claim 10, wherein two pairs of switches are connected to the resonant circuit in a full-bridge configuration, and wherein the control circuit includes third and fourth NAND gates, the third NAND gate having a first input coupled to the output of the second NAND gate, a second input that receives the enable signal, and an output coupled to a first pair of the switches and the fourth NAND gate having a first input coupled to the output of the first NAND gate, a second input that receives the enable signal, and an output coupled to a second pair of the switches.

14. The circuit of claim 10, wherein a resistor is coupled between the output and the second input of the first NAND gate.

15. The circuit of claim 9, wherein the second feedback circuit includes a resistor that senses current flow through the resonant circuit.

16. The circuit of claim 9, wherein the second feedback circuit further includes a capacitor coupling the resistor to the first NAND gate.

17. The circuit of claim 8, wherein the oscillator further includes an inverter coupled between an output of logic gate and the second impedance.

18. The circuit of claim 17, wherein the first impedance is a capacitor and the second impedance is a resistor.

19. The circuit of claim 8, wherein the logic gate is an AND gate.

20. The circuit of claim 8, wherein the drive circuit comprises a plurality of inverters coupled together in parallel.

21. The circuit of claim 8, wherein the logic gate includes a first input that receives an enable signal from the microprocessor and a second input coupled to the output of the integrator.

22. The circuit of claim 8, wherein the oscillator generates a second PWM waveform that is controlled by the output of the integrator, and wherein the output of the integrator is controlled by the feedback circuit and the PWM waveform developed by the microprocessor.