Protocol adapter for passing diagnostic messages between a host computer and vehicle networks operating in a J1989 or J1708 protocol

• US 7,725,630 B2
• Filed: 12/17/2007
• Issued: 05/25/2010
• Est. Priority Date: 03/26/1999
• Status: Active Grant

• Current Assignee: Dearborn Group, Inc.
• Original Assignee: Dearborn Group, Inc.
• Inventors: McClure, Robert E., Such, David M.
• Primary Examiner(s): PEYTON, TAMMARA R
• Application Number:
  US12/002,427
• Publication Number:
  US 20080098137A1
• Time in Patent Office: 890 Days
• Field of Search: 701/31, 701/33, 701/36, 701/35, 701/53, 701/29, 710 72- 74
• US Class Current: 710/72
• CPC Class Codes: G05B 19/042 using digital processors G05B19/05 takes precedence
• CPC Class Codes: G05B 2219/21134 Signal adaption circuit build into connector
• CPC Class Codes: G05B 2219/25451 Connect module to bus using interface with adaptive logic
• CPC Class Codes: G05B 2219/2637 Vehicle, car, auto, wheelchair
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration

Abstract

A protocol adapter for transferring diagnostic messages between networks within a vehicle and a host computer. The protocol adapter operates as a voltage translator to support J1708 software. The protocol adapter also recognizes when the protocol adapter is connected to a host computer running the J1939 and/or J1708 protocols and automatically switches to that protocol.

Claims

1. A protocol adapter for transferring diagnostic messages between a vehicle network in a vehicle and an external host computer, said adapter comprising:

a control area network (CAN) transceiver circuit, said CAN transceiver circuit providing an interface between the vehicle network and the host computer when the vehicle network is operating in a first protocol; and

a J1708 transceiver circuit, said J1708 transceiver circuit providing an interface between the vehicle network and the host computer when the vehicle network is operating in a J1708 protocol and the protocol adapter is operating in a pass-through mode, said J1708 transceiver circuit including a voltage translator for translating the voltage of the J1708 protocol signals.

2. The protocol adapter according to claim 1 further comprising an RS-232 transceiver, said RS-232 transceiver circuit providing an interface to an RS-232 port on the host computer.

3. The protocol adapter according to claim 1 further comprising a static random access memory (RAM) circuit, said RAM circuit including a RAM that provides temporary data storage and is connected to a CPU through data and address channels.

4. The protocol adapter according to claim 3 wherein the RAM circuit further provides redirection of mailbox data, storage for oversized messages and the concatenation of small messages.

5. The protocol adapter according to claim 1 further comprising a flash memory module, said flash memory module providing permanent storage of application data and loader application information.

6. The protocol adapter according to claim 1 further comprising a universal asynchronous receive and transmit (UART) circuit, said UART circuit providing communication of asynchronous data to and from the host computer.

7. The protocol adapter according to claim 1 further comprising a CPU I/O interface circuit, said CPU I/O interface circuit providing an interface between a CPU and the transceiver circuits.

8. A protocol adapter for transferring diagnostic messages between a vehicle network in a vehicle and an external host computer, said adapter comprising:

an I/O board, said I/O board including an external I/O interface circuit, an RS-232 transceiver circuit for providing an interface to an RS-232 port on the host computer, a power supply regulator circuit, a controller area network (CAN) transceiver circuit for providing an interface between the vehicle network and the host computer when the vehicle network is operating in a J1939 protocol, a J1708 transceiver circuit for providing an interface between the vehicle network and the host computer when the vehicle network is operating in a J1708 protocol, said J1708 transceiver circuit including a voltage translator for translating the voltage of the J1708 protocol signals, and an LED circuit; and

a CPU board, said CPU board including a CPU, a device decoder circuit that decodes input signals sent to the CPU, a static RAM circuit for providing temporary data storage and is connected to the CPU through data and address channels, a flash memory module for providing a flash memory storage for permanent storage of application data and loader application information, a universal asynchronous receive transmit (UART) circuit for providing communication of asynchronous data to and from the host computer and a CPU I/O interface circuit for providing an interface between the CPU and other adapter circuits.

9. The protocol adapter according to claim 8 wherein the RAM circuit further provides redirection of mailbox data, storage for oversized messages and the concatenation of small messages.