Method of forming a semiconductor device having a removable sidewall spacer
First Claim
Patent Images
1. A method of forming a semiconductor device using a semiconductor substrate, comprising:
- forming a gate dielectric over the semiconductor substrate;
forming a gate electrode layer over the gate dielectric;
forming a patterned masking layer over the gate electrode layer, wherein a first region of the gate electrode layer lies within an opening in the patterned masking layer;
partially etching the first region of the gate electrode layer to form a polysilicon inverse “
T”
structure from the gate electrode layer and leave an elevated portion of the gate electrode layer forming a gate structure and a lower portion adjacent to the elevated portion;
forming a sidewall spacer adjacent to the elevated portion and over the lower portion;
performing an implant into the semiconductor substrate using the elevated portion and the sidewall spacer as a mask to form a first source/drain region;
removing the sidewall spacer to expose the polysilicon inverse “
T”
structure;
removing the lower portion;
heating the first source/drain region;
implanting into the semiconductor substrate, after the step of heating the first source/drain region, using the gate structure as a mask to form a source/drain extension region in the substrate laterally adjacent to the gate structure; and
heating the source/drain extension region.
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Abstract
A semiconductor device is formed using a semiconductor substrate. A gate dielectric is formed over the semiconductor substrate. A gate electrode layer is formed over the gate dielectric. A patterned masking layer is formed over the gate electrode layer. A first region of the gate electrode layer lies within an opening in the patterned masking layer. The first region of the gate electrode layer is partially etched to leave an elevated portion of the gate electrode layer and a lower portion adjacent to the elevated portion. A sidewall spacer is formed adjacent to the elevated portion and over the lower portion. An implant is performed into the semiconductor substrate using the elevated portion and the sidewall spacer as a mask. The sidewall spacer and the lower portion are removed.
11 Citations
11 Claims
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1. A method of forming a semiconductor device using a semiconductor substrate, comprising:
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forming a gate dielectric over the semiconductor substrate; forming a gate electrode layer over the gate dielectric; forming a patterned masking layer over the gate electrode layer, wherein a first region of the gate electrode layer lies within an opening in the patterned masking layer; partially etching the first region of the gate electrode layer to form a polysilicon inverse “
T”
structure from the gate electrode layer and leave an elevated portion of the gate electrode layer forming a gate structure and a lower portion adjacent to the elevated portion;forming a sidewall spacer adjacent to the elevated portion and over the lower portion; performing an implant into the semiconductor substrate using the elevated portion and the sidewall spacer as a mask to form a first source/drain region; removing the sidewall spacer to expose the polysilicon inverse “
T”
structure;removing the lower portion; heating the first source/drain region; implanting into the semiconductor substrate, after the step of heating the first source/drain region, using the gate structure as a mask to form a source/drain extension region in the substrate laterally adjacent to the gate structure; and heating the source/drain extension region. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of forming a semiconductor device using a semiconductor substrate, comprising:
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forming a gate dielectric over the semiconductor substrate; forming a polysilicon layer over the gate dielectric; forming a mask over the polysilicon layer; etching the polysilicon layer using the mask to remove portions of the polysilicon layer to form a polysilicon inverse “
T”
structure having a gate structure of polysilicon and a lower portion of polysilicon adjacent to the gate structure;forming a sidewall spacer on the lower portion and adjacent to the gate structure; implanting through the lower portion using the sidewall spacer as a mask to form a first source/drain region in the semiconductor substrate spaced laterally from the gate structure; removing the sidewall spacer to expose the polysilicon inverse “
T”
structure;removing the lower portion of polysilicon; heating the first source/drain region; implanting into the semiconductor substrate, after the step of heating the first source/drain region, using the gate structure as a mask to form a source/drain extension region in the substrate laterally adjacent to the gate structure; and heating the source/drain extension region. - View Dependent Claims (8, 9, 10, 11)
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Specification
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Current AssigneeNXP USA, Inc. (NXP Semiconductors NV)
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Original AssigneeFreescale Semiconductor, Inc. (NXP Semiconductors NV)
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InventorsMathew, Leo, Trivedi, Vishal P.
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Primary Examiner(s)TRINH, MICHAEL MANH
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Application NumberUS11/671,567Publication NumberTime in Patent Office1,211 DaysField of Search438/197, 438/299, 438/303, 438/305, 257/E21.435US Class Current438/197CPC Class CodesH01L 21/2652 Through-implantationH01L 21/2658 of a molecular ion, e.g. de...H01L 29/665 using self aligned silicida...H01L 29/6653 using the removal of at lea...
