Semiconductor device and manufacturing method thereof

• US 7,728,334 B2
• Filed: 08/14/2008
• Issued: 06/01/2010
• Est. Priority Date: 03/08/2000
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kuwabara, Hideaki, Arai, Yasuyuki, Yamazaki, Shunpei
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US12/222,687
• Publication Number:
  US 20080315208A1
• Time in Patent Office: 656 Days
• Field of Search: 257/59, 257/72, 257/291, 257/408, 257/E27.1, 257/E29.151, 438/149, 438/164
• US Class Current: 257/72
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136231 for reducing the number of lithographic steps
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: G02F 2202/103 a-Si
• CPC Class Codes: G02F 2202/105 single crystal Si
• CPC Class Codes: G02F 2202/28 Adhesive materials or arrangements
• CPC Class Codes: H01L 21/67161 characterized by the layout of the process chambers
• CPC Class Codes: H01L 21/67167 surrounding a central transfer chamber
• CPC Class Codes: H01L 21/67207 comprising a chamber adapted to a particular process
• CPC Class Codes: H01L 21/67225 comprising at least one lithography chamber lithographic apparatuses G03F7/00
• CPC Class Codes: H01L 21/67236 : the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
• CPC Class Codes: H01L 27/1218 : with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 : with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 : with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 : for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1255 : integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 : employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66765 : Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78669 : with inverted-type structure, e.g. with bottom gate

Abstract

A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high.

By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.

Claims

1. A display device comprising:

a thin film transistor comprising a gate electrode formed over a substrate, an insulating film formed over the gate electrode, a first semiconductor film formed over the insulating film, source and drain regions formed over the first semiconductor film, and a source electrode over the source region, and a drain electrode formed over the drain region;

a gate wiring being continuous to the gate electrode, formed between the substrate and the insulating film;

a second semiconductor film being continuous to the first semiconductor film, formed over the insulating film;

a third semiconductor film being continuous to the source region, formed over the second semiconductor film;

a source wiring being continuous to the source electrode, formed over the third semiconductor film;

a transparent conductive film formed over the thin film transistor, which comprises a first portion and a second portion; and

a pixel electrode comprising the first portion of the transparent conductive film connected to the drain electrode;

wherein a portion of the second semiconductor film is wider than the source wiring and the third semiconductor film at least at an intersection of the gate wiring and the source wiring,

wherein the second portion of the transparent conductive film overlaps with the source wiring,

wherein the transparent conductive film, the source wiring, the second semiconductor film and the third semiconductor film are formed in a source wiring terminal portion, and

wherein the transparent conductive film is wider than the source wiring in the source wiring terminal portion.

2. A display device according to claim 1, wherein the first semiconductor film comprises a microcrystalline semiconductor.

3. A display device according to claim 1, wherein the gate wiring comprises aluminum containing neodymium.

4. A display device according to claim 1, wherein the insulating film comprises silicon nitride.

5. A display device comprising:

a thin film transistor comprising a gate electrode formed over a substrate, an insulating film formed over the gate electrode, a first semiconductor film formed over the insulating film, source and drain regions formed over the first semiconductor film, and a source electrode over the source region, and a drain electrode formed over the drain region;

a gate wiring being continuous to the gate electrode, formed between the substrate and the insulating film;

a second semiconductor film being continuous to the first semiconductor film, formed over the insulating film;

a third semiconductor film being continuous to the source region, formed over the second semiconductor film;

a source wiring being continuous to the source electrode, formed over the third semiconductor film;

a transparent conductive film formed over the thin film transistor, which comprises a first portion and a second portion; and

a pixel electrode comprising the first portion of the transparent conductive film connected to the drain electrode;

wherein a portion of the second semiconductor film is wider than the source wiring and the third semiconductor film at least at an intersection of the gate wiring and the source wiring,

wherein the second portion of the transparent conductive film overlaps with the source wiring,

wherein the transparent conductive film, the source wiring, the second semiconductor film and the third semiconductor film are formed in a source wiring terminal portion,

wherein the transparent conductive film is wider than the source wiring in the source wiring terminal portion,

wherein a first portion of the drain electrode over the gate electrode is narrower than a second portion of the drain electrode, and

wherein a first portion of the first semiconductor film not covered by the source and drain regions is thinner than a second portion of the first semiconductor film covered by the source and drain regions.

6. A display device according to claim 5, wherein the first semiconductor film comprises a microcrystalline semiconductor.

7. A display device according to claim 5, wherein the gate wiring comprises aluminum containing neodymium.

8. A display device according to claim 5, wherein the insulating film comprises silicon nitride.

9. A display device comprising:

a gate wiring comprising a first conductive material, over a first substrate;

an insulating film over the gate wiring;

a semiconductor film over the insulating film;

a source region and a drain region over the semiconductor film a source electrode and a drain electrode formed over the source region and the drain region, respectively, each of the source electrode and the drain electrode comprising a second conductive material;

a source wiring being continuous to the source electrode;

a pixel electrode comprising a transparent conductive film in contact with the drain electrode;

a first terminal portion electrically connected to the gate wiring, comprising;

a first layer comprising a same material as the first conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second terminal portion electrically connected to the source wiring, comprising;

a first layer comprising a same material as the second conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second substrate joined to the first substrate by using a sealing material;

a second electrode formed adjacent to the second substrate so as to be opposed the pixel electrode;

an IC chip over the first substrate, electrically connected to at least one of the first and second terminal portions.

10. The display device according to claim 9, wherein the semiconductor film comprises microcrystalline silicon.

11. The display device according to claim 9, wherein the semiconductor film comprises amorphous silicon.

12. The display device according to claim 9, wherein the transparent conductive film is ITO.

13. The display device according to claim 9, wherein the transparent conductive film includes indium oxide and zinc oxide.

14. A display device comprising:

a gate wiring comprising a first conductive material, over a first substrate;

an insulating film over the gate wiring;

a semiconductor film over the insulating film;

a source region and a drain region over the semiconductor film;

a source electrode and a drain electrode formed over the source region and the drain region, respectively, each of the source electrode and the drain electrode comprising a second conductive material;

a source wiring being continuous to the source electrode;

a pixel electrode comprising a transparent conductive film in contact with the drain electrode;

a first terminal portion electrically connected to the gate wiring, comprising;

a first layer comprising a same material as the first conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second terminal portion electrically connected to the source wiring, comprising;

a first layer comprising a same material as the second conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second substrate joined to the first substrate by using a sealing material; and

a second electrode formed adjacent to the second substrate so as to be opposed the pixel electrode.

15. The display device according to claim 14, wherein the semiconductor film comprises microcrystalline silicon.

16. The display device according to claim 14, wherein the semiconductor film comprises amorphous silicon.

17. The display device according to claim 14, wherein the transparent conductive film is ITO.

18. The display device according to claim 14, wherein the transparent conductive film includes indium oxide and zinc oxide.

19. A display device comprising:

a gate wiring comprising a first conductive material, over a first substrate;

an insulating film over the gate wiring;

a first semiconductor film over the insulating film;

a source region and a drain region over the first semiconductor film;

a source electrode and a drain electrode formed over the source region and the drain region, respectively, each of the source electrode and the drain electrode comprising a second conductive material;

a source wiring being continuous to the source electrode;

a pixel electrode comprising a transparent conductive film in contact with the drain electrode;

a first terminal portion electrically connected to the gate wiring, comprising;

a first layer comprising a same material as the first conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second terminal portion electrically connected to the source wiring, comprising;

a first layer over the first substrate, comprising a same material as the first semiconductor film;

a second layer formed on the first layer and comprising a same material as the source region and the drain region;

a third layer formed on the second layer and comprising a same material as the second conductive material; and

a fourth layer formed on the third layer and comprising a same material as the transparent conductive film,

a second substrate joined to the first substrate by using a sealing material;

a second electrode formed adjacent to the second substrate so as to be opposed the pixel electrode;

an IC chip over the first substrate, electrically connected to at least one of the first and second terminal portions.

20. The display device according to claim 19, wherein the first semiconductor film comprises microcrystalline silicon.

21. The display device according to claim 19, wherein the first semiconductor film comprises amorphous silicon.

22. The display device according to claim 19, wherein the transparent conductive film is ITO.

23. The display device according to claim 19, wherein the transparent conductive film includes indium oxide and zinc oxide.

24. A display device comprising:

a gate wiring comprising a first conductive material, over a first substrate;

an insulating film over the gate wiring;

a first semiconductor film over the insulating film;

a source region and a drain region over the first semiconductor film;

a source electrode and a drain electrode formed over the source region and the drain region, respectively, each of the source electrode and the drain electrode comprising a second conductive material;

a source wiring being continuous to the source electrode;

a pixel electrode comprising a transparent conductive film in contact with the drain electrode

a first terminal portion electrically connected to the gate wiring, comprising;

a first layer comprising a same material as the first conductive material, over the first substrate; and

a second layer comprising a same material as the transparent conductive film, over the first layer,

a second terminal portion electrically connected to the source wiring, comprising;

a first layer over the first substrate, comprising a same material as the first semiconductor film;

a second layer formed on the first layer and comprising a same material as the source region and the drain region;

a third layer formed on the second layer and comprising a same material as the second conductive material; and

a fourth layer formed on the third layer and comprising a same material as the transparent conductive film,

a second substrate joined to the first substrate by using a sealing material; and

a second electrode formed adjacent to the second substrate so as to be opposed the pixel electrode.

25. The display device according to claim 24, wherein the first semiconductor film comprises microcrystalline silicon.

26. The display device according to claim 24, wherein the first semiconductor film comprises amorphous silicon.

27. The display device according to claim 24, wherein the transparent conductive film is ITO.

28. The display device according to claim 24, wherein the transparent conductive film includes indium oxide and zinc oxide.

29. A display device comprising:

a thin film transistor comprising a gate electrode formed over a substrate, an insulating film formed over the gate electrode, a first semiconductor film formed over the insulating film, source and drain regions formed over the first semiconductor film, and a source electrode over the source region, and a drain electrode formed over the drain region;

a pixel electrode comprising a transparent conductive material, formed over the thin film transistor, and connected to the drain electrode;

a gate wiring formed between the substrate and the insulating film and being continuous to the gate electrode;

a source wiring being continuous to the source electrode, the source wiring comprising a second semiconductor film and a third semiconductor film formed on the second semiconductor film; and

a source wiring terminal portion formed over the substrate and including a first layer comprising a same material as the first semiconductor film, a second layer formed on the first layer, the second layer comprising a same material as the source region and the drain region, a third layer formed on the second layer, the third layer comprising a same material as the source electrode, and a fourth layer formed on the third layer, the fourth layer comprising a same material as the transparent conductive material,

wherein the second semiconductor film is continuous to the first semiconductor film, and comprises a same material as the first semiconductor film,

wherein the third semiconductor film is continuous to the source region, and comprises a same material as the source region,

wherein at least a portion of the second semiconductor film is wider than the source wiring and the third semiconductor film at least at an intersection of the gate wiring and the source wiring,

wherein the fourth layer is wider than the third layer in the source wiring terminal portion.

30. The display device according to claim 29, wherein the first semiconductor film comprises microcrystalline silicon.

31. The display device according to claim 29, wherein the first semiconductor film comprises amorphous silicon.

32. The display device according to claim 29, wherein the transparent conductive material is ITO.

33. The display device according to claim 29, wherein the transparent conductive material includes indium oxide and zinc oxide.

34. A display device comprising:

a thin film transistor comprising a gate electrode formed over a substrate, an insulating film formed over the gate electrode, a first semiconductor film formed over the insulating film, source and drain regions formed over the first semiconductor film, and a source electrode over the source region, and a drain electrode formed over the drain region;

a pixel electrode comprising a transparent conductive material, formed over the thin film transistor, and connected to the drain electrode;

a gate wiring formed between the substrate and the insulating film and being continuous to the gate electrode;

a source wiring being continuous to the source electrode, the source wiring comprising a second semiconductor film and a third semiconductor film formed on the second semiconductor film;

a gate wiring terminal portion comprising a first layer comprising a same material as the gate electrode and a second layer comprising a same material as the transparent conductive material;

a source wiring terminal portion formed over the substrate and including a first layer comprising a same material as the first semiconductor film, a second layer formed on the first layer, the second layer comprising a same material as the source region and the drain region, a third layer formed on the second layer, the third layer comprising a same material as the source electrode, and a fourth layer formed on the third layer, the fourth layer comprising a same material as the transparent conductive material,

wherein the second semiconductor film is continuous to the first semiconductor film, and comprises a same material as the first semiconductor film,

wherein the third semiconductor film is continuous to the source region, and comprises a same material as the source region,

wherein at least a portion of the second semiconductor film is wider than the source wiring and the third semiconductor film at least at an intersection of the gate wiring and the source wiring,

wherein the fourth layer is wider than the third layer in the source wiring terminal portion.

35. The display device according to claim 34, wherein the first semiconductor film comprises microcrystalline silicon.

36. The display device according to claim 34, wherein the first semiconductor film comprises amorphous silicon.

37. The display device according to claim 34, wherein the transparent conductive material is ITO.

38. The display device according to claim 34, wherein the transparent conductive material includes indium oxide and zinc oxide.