Motor driving circuit

• US 7,728,540 B2
• Filed: 09/25/2007
• Issued: 06/01/2010
• Est. Priority Date: 09/25/2006
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Sugie, Hisashi
• Primary Examiner(s): Duda; Rina I
• Application Number:
  US11/860,903
• Publication Number:
  US 20080247734A1
• Time in Patent Office: 980 Days
• Field of Search: 318/632, 318/461, 318/600, 318/432
• US Class Current: 318/432
• CPC Class Codes: H02P 6/17 and for generating speed information

Abstract

A motor driving circuit drives a motor on receipt of an error signal having a digital value corresponding to a deviation between a current rotation speed of the motor, which is the subject to be driven, and its target value. A digital filter eliminates a high-frequency component of the error signal. A driving unit controls an electric current flowing through the motor in accordance with the digital value of the error signal from which the high-frequency component is eliminated by the digital filter. An upper-limit value setting unit sets an upper limit value to the digital value of the error signal input to the digital filter. The upper-limit value setting unit is configured to be capable of changing the upper limit value in accordance with a setting signal from the outside.

Claims

1. A motor driving circuit that receives an error signal having a digital value corresponding to a deviation between a current rotation speed of a motor, which is a subject to be driven, and its target value, so as to drive the motor, comprising:

a digital filter that eliminates a high-frequency component of the error signal;

a driving unit that controls an electric current flowing through the motor in accordance with the digital value of the error signal from which the high-frequency component is eliminated by the digital filter; and

an upper-limit value setting unit that sets an upper limit value to the digital value of the error signal input to the digital filter, and wherein

the upper-limit value setting unit is configured to change the upper limit value according to a setting signal from the outside and wherein

the error signal comprises m bits, where m is a natural number; and

the upper-limit value setting unit invalidates the high-order n bits, where n is a natural number satisfying n<

m, of the digital value of the error signal.

2. A motor driving circuit according to claim 1, wherein the bit number n that is to be invalidated can be externally set.

3. A motor driving circuit according to claim 1, wherein the error signal is an output from a speed discriminator that outputs a digital signal according to a frequency deviation between an output signal from a speed sensor, which detects the rotation speed of the motor, and a clock signal according to the target value of the rotation speed.

4. A motor driving circuit according to claim 1, wherein at least a part of the digital filter is composed of an infinite impulse response type, and the value of the output from a filter block of the infinite impulse response type is initialized to a predetermined initial value upon starting the drive of the motor.

5. A motor driving circuit according to claim 4, wherein the initial value of the output from the filter block of the infinite impulse response type can be externally set.

6. A motor driving circuit according to claim 1, which is integrated on one semiconductor substrate.

7. A motor driving circuit according to claim 1, wherein the driving unit comprises:

a pulse-width modulator that generates a pulse signal subjected to pulse width modulation in accordance with the digital value of the error signal;

an H-bridge circuit connected to the coil of the motor; and

a pre-driver that drives the H-bridge circuit according to the pulse signal.

8. A motor driving apparatus comprising:

a speed sensor that produces a speed signal having a frequency according to a rotation speed of a motor, which is a subject to be driven;

a clock signal generating unit that generates a clock signal having a frequency according to a target value of the rotation speed of the motor;

a speed discriminator that receives the speed signal output from the speed sensor and the clock signal so as to output an error signal having a digital value according to the deviation between the frequencies of two signals; and

a motor driving circuit that drives the motor on the basis of the error signal output from the speed discriminator, the motor driving circuit comprising;

a digital filter that eliminates a high-frequency component of the error signal;

a driving unit that controls an electric current flowing through the motor in accordance with the digital value of the error signal from which the high-frequency component is eliminated by the digital filter; and

an upper-limit value setting unit that sets an upper limit value to the digital value of the error signal input to the digital filter, and wherein

the upper-limit value setting unit is configured to change the upper limit value according to a setting signal from the outside and wherein

the error signal comprises m bits, where m is a natural number; and

the upper-limit value setting unit invalidates the high-order n bits, where n is a natural number satisfying n<

m, of the digital value of the error signal.

9. An electronic apparatus comprising:

a motor driving apparatus that drives the motor; and

a movable unit whose position is changed by the motor;

wherein the motor driving apparatus comprises;

a speed sensor that produces a speed signal having a frequency according to a rotation speed of a motor, which is a subject to be driven;

a clock signal generating unit that generates a clock signal having a frequency according to a target value of the rotation speed of the motor;

a speed discriminator that receives the speed signal output from the speed sensor and the clock signal so as to output an error signal having a digital value according to the deviation between the frequencies of two signals; and

a motor driving circuit that drives the motor on the basis of the error signal output from the speed discriminator, the motor driving circuit comprising;

a digital filter that eliminates a high-frequency component of the error signal;

a driving unit that controls an electric current flowing through the motor in accordance with the digital value of the error signal from which the high-frequency component is eliminated by the digital filter; and

an upper-limit value setting unit that sets an upper limit value to the digital value of the error signal input to the digital filter, and wherein

the upper-limit value setting unit is configured to change the upper limit value according to a setting signal from the outside and wherein

the error signal comprises m bits, where m is a natural number; and

the upper-limit value setting unit invalidates the high-order n bits, where n is a natural number satisfying n<

m, of the digital value of the error signal.