Copper interconnect structure having stuffed diffusion barrier

• US 7,732,331 B2
• Filed: 11/16/2004
• Issued: 06/08/2010
• Est. Priority Date: 12/06/2000
• Status: Active Grant

• Current Assignee: ASM International NV
• Original Assignee: ASM International NV
• Inventors: Kim, Ki-Bum, Soininen, Pekka J., Raaijmakers, Ivo
• Primary Examiner(s): Fahmy; Wael
• Assistant Examiner(s): Rao; Shrinivas H.
• Application Number:
  US10/998,229
• Publication Number:
  US 20050101132A1
• Time in Patent Office: 2,030 Days
• Field of Search: 257/754, 257/757, 257/761, 257/765, 257/770, 438/687, 438/688, 438/358, 438/85
• US Class Current: 438/687
• CPC Class Codes: H01L 21/28562 Selective deposition
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76858 by diffusing alloying elements
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.

Claims

1. A process for copper metallization comprising:

depositing a diffusion barrier comprising grain boundaries over a semiconductor substrate;

after depositing the diffusion barrier, separately providing a compounding material and incorporating the compounding material into the diffusion barrier;

depositing a layer of a reactive metal formed to a thickness of about 0.1-2.0 nm over the diffusion baffler;

stuffing the grain boundaries of the diffusion baffler with a compound of the reactive metal from the layer of the reactive metal and the compounding material; and

depositing a layer of copper over the diffusion barrier.

2. The process of claim 1, wherein the diffusion baffler comprises a metal nitride.

3. The process of claim 2, wherein the diffusion baffler comprises a metal nitride selected from the group consisting of titanium nitride, tungsten nitride and tantalum nitride.

4. The process of claim 3, wherein the diffusion baffler comprises titanium nitride.

5. The process of claim 2, wherein the reactive metal is selected from the group consisting of Al, Si, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mg, Y and La.

6. The process of claim 5, wherein the reactive metal is Al.

7. The process of claim 2, wherein the reactive metal is selected from the group consisting of metals of group IIIB of the periodic table, metals of group VIB of the periodic table, metals of group VB of the periodic table, and metals of Group VIB of the periodic table.

8. The process of claim 2, wherein incorporating a compounding material comprises incorporating nitrogen into the diffusion baffler prior to depositing the layer of reactive metal.

9. The process of claim 2, wherein incorporating a compounding material comprises incorporating oxygen into the diffusion barrier prior to depositing the layer of reactive metal.

10. The process of claim 9, wherein incorporating oxygen into the diffusion barrier comprises annealing the substrate in the presence of oxygen.

11. The process of claim 9, wherein incorporating oxygen into the diffusion barrier comprises treating the diffusion barrier with excited oxygen species.

12. The process of claim 2, further comprising depositing a second metal nitride layer between depositing the layer of reactive metal and depositing the layer of copper.

13. The process of claim 9, wherein forming a different metal compound comprises forming metal oxide by annealing after deposition of the reactive metal layer.

14. The process of claim 2, wherein forming a different metal compound comprises forming metal oxide by annealing in the presence of oxygen.

15. The process of claim 14, wherein forming a different metal compound comprises forming metal oxide by annealing in the presence of oxygen after deposition of the second metal nitride layer and before depositing the copper layer.

16. The process of claim 2, wherein the layer of reactive metal is deposited to a thickness of about 2 nm.

17. The process of claim 2, wherein the metal nitride is deposited to a thickness of about 5 to 10 nm.

18. The process of claim 2, wherein the metal nitride layer is deposited by atomic layer deposition (ALD).

19. The process of claim 2, wherein the reactive metal layer is deposited by a process selected from the group consisting of chemical vapor deposition (CVD) and atomic layer deposition (ALD).

20. The process of claim 2, wherein the reactive metal layer is deposited by plasma enhanced atomic layer deposition (PEALD).

21. A process for copper metallization comprising:

depositing a metal nitride diffusion barrier comprising grain boundaries over a semiconductor substrate;

after depositing the diffusion barrier, separately providing a compounding material and incorporating the compounding material into the diffusion barrier;

depositing a layer of a reactive metal formed to a thickness of about 0.1-2.0 nm over the diffusion barrier;

moving the reactive metal from the layer of the reactive metal through the grain boundaries of the diffusion barrier to stuff the grain boundaries with a compound of the reactive metal and the compounding material; and

depositing a layer of copper over the diffusion barrier.

22. The process of claim 21, wherein the metal nitride is selected from the group consisting of titanium nitride, tungsten nitride and tantalum nitride.

23. The process of claim 21, wherein the compounding material is selected from the group consisting of oxygen and nitrogen.

24. The process of claim 21, wherein incorporating a compounding material into the diffusion barrier comprises exposing the metal nitride diffusion barrier to air.

25. The process of claim 21, wherein incorporating a compounding material into the diffusion barrier comprises annealing the metal nitride diffusion barrier in the presence of oxygen.

26. The process of claim 21, wherein incorporating a compounding material into the diffusion barrier comprises treating the metal nitride diffusion barrier with activated oxygen.

27. The process of claim 21, wherein moving the reactive metal through the grain boundaries comprises annealing.

28. The process of claim 21, wherein the reactive metal is aluminum.

29. The process of claim 28, wherein the compounding material is oxygen.

30. The process of claim 29, wherein the grain boundaries are stuffed with aluminum oxide.

31. A process for copper metallization comprising:

depositing a metal nitride layer on a semiconductor substrate;

depositing a layer of a reactive metal over the metal nitride layer, the reactive metal being different from any metal in the metal nitride layer and wherein the reactive metal is selected from the group consisting of Al, Si, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mg, Y and La;

depositing a second metal nitride layer directly over and contacting the reactive metal layer; and

forming a metal compound in the grain boundaries of the metal nitride layers, the metal compound formed from the reactive metal.

32. The process of claim 31, additionally comprising depositing a layer of copper directly over the second metal nitride layer.

33. The process of claim 31, wherein the first metal nitride layer is titanium nitride.

34. The process of claim 31, wherein the second metal nitride layer is titanium nitride.

35. The process of claim 31, wherein the reactive metal layer is aluminum.

36. The process of claim 31, wherein the reactive metal layer is silicon.

37. The process of claim 31, wherein a layer of titanium is deposited over the reactive metal layer prior to depositing the second metal nitride layer.

38. The process of claim 31, additionally comprising depositing a second metal layer over the reactive metal prior to depositing the second metal nitride layer.

39. A process of forming a barrier layer during semiconductor metallization comprising:

depositing a layer of titanium nitride in a damascene trench by atomic layer deposition (ALD);

depositing a layer of aluminum on the layer of titanium nitride; and

depositing a second layer of titanium nitride directly on and contacting the layer of aluminum.

40. The process of claim 39, wherein the layer of aluminum is deposited by MOCVD.

41. The process of claim 40, wherein the layer of aluminum is deposited from dimethylethylamine alane (DMEAA).

42. The process of claim 39, wherein the layer of aluminum is deposited by plasma enhanced atomic layer deposition (PEALD).

43. The process of claim 39, wherein the second layer of titanium nitride is deposited by atomic layer deposition (ALD).

44. The process of claim 39, additionally comprising annealing in the presence of oxygen following deposition of the second layer of titanium nitride.