Vertically formed inductor and electronic device having the same

• US 7,733,207 B2
• Filed: 03/24/2008
• Issued: 06/08/2010
• Est. Priority Date: 05/31/2007
• Status: Expired due to Fees

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Yun, Ho Gyeong, Moon, Jong Tae, Choi, Kwang Seong
• Primary Examiner(s): Donovan; Lincoln
• Assistant Examiner(s): LIAN, MANG TIN BIK
• Application Number:
  US12/053,716
• Publication Number:
  US 20080297299A1
• Time in Patent Office: 806 Days
• Field of Search: None
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 2017/002 Details of via holes for interconnecting the layers
• CPC Class Codes: H01F 2017/0073 with a special conductive pattern, e.g. flat spiral
• CPC Class Codes: H01F 27/34 Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields

Abstract

Provided are an inductor, which is vertically formed, and an electronic device having the inductor, and more particularly, an inductor capable of minimizing loss of a surface area and accomplishing high efficiency impedance by vertically forming the inductor in a plurality of insulating layers, and an electronic device having the same. The inductor includes a plurality of conductive lines disposed in the insulating layers; and vias vertically formed in the insulating layers to electrically connect the plurality of conductive lines. When a board or an electronic device including an inductor proposed by the present invention is manufactured, the inductor can occupy a minimum area in the electronic device or board while providing high inductance. In particular, the surface area of the electronic device or board occupied by the inductor can be remarkably decreased to reduce manufacturing costs.

Claims

1. An inductor, which is vertically disposed in a plurality of insulating layers of a low temperature co-fired ceramic (LTCC) substrate, comprising:

a plurality of conductive lines disposed on the insulating layers, including a first conductive line, a second conductive line and a third conductive line; and

vias vertically formed in the insulating layers to electrically connect the plurality of conductive lines, including a first via and a second via,

wherein the first and third conductive lines are disposed on an uppermost surface of the insulating layers, the second conductive line is disposed lower than the first and third conductive lines, an upper end of the first via is connected to the first conductive line, a lower end of the first via is connected to a first end of the second conductive line, a lower end of the second via is connected to a second end of the second conductive line, and an upper end of the second via is connected to the third conductive line, and

wherein the second conductive line extends in a direction perpendicular to a direction of a line that connects one end of the first conductive line and the other end of the first conductive line, and

wherein the second conductive line extends in a direction perpendicular to a direction of a line that connects one end of the third conductive line and the other end of the third conductive line.

2. The inductor of claim 1, further comprising a third via and a fourth via, wherein:

said one end of the first conductive line is connected to the upper end of the first via and said the other end of the first conductive line is connected to an upper end of the third via;

said one end of the third conductive line is connected to the upper end of the second via and said the other end of the third conductive line is connected to an upper end of the fourth via;

the first conductive line extends linearly from said one end to said the other end of the first conductive line; and

the third conductive line extends linearly from said one end to said the other end of the third conductive line.

3. The inductor of claim 1, further comprising a fourth conductive line, wherein the fourth conductive line is disposed lower than the second conductive line.

4. The inductor of claim 3, wherein the fourth conductive line extends in a direction parallel to the direction in which the second conductive line extends.

5. The inductor of claim 3, further comprising:

a fifth conductive line and a sixth conductive line, both being disposed on the uppermost surface of the insulating layers;

a fifth via for connecting one end of the fourth conductive line to the fifth conductive line; and

a sixth via for connecting the other end of the fourth conductive line to the sixth conductive line.