Self testing digital fault interrupter

• US 7,733,617 B2
• Filed: 08/08/2005
• Issued: 06/08/2010
• Est. Priority Date: 08/08/2005
• Status: Active Grant

• Current Assignee: Hubbell, Inc.
• Original Assignee: Hubbell, Inc.
• Inventors: Yu, Daming, Mortun, Sorin I., Baldwin, John R.
• Primary Examiner(s): Jackson; Stephen W
• Assistant Examiner(s): MAI, TIEN HUNG
• Application Number:
  US11/198,400
• Publication Number:
  US 20070030608A1
• Time in Patent Office: 1,765 Days
• Field of Search: 361/42
• US Class Current: 361/42
• CPC Class Codes: H01H 2071/044 Monitoring, detection or measuring systems to establish the end of life of the switching device, can also contain other on-line monitoring systems, e.g. for detecting mechanical failures
• CPC Class Codes: H01H 83/04 with testing means for indicating the ability of the switch or relay to function properly
• CPC Class Codes: H02H 3/04 with warning or supervision in addition to disconnection, e.g. for indicating that protective apparatus has functioned watching of pilot wires H02H1/0084; protection of protective arrangements H02H7/008; indication of the state of electronic switches H03K17/18
• CPC Class Codes: H02H 3/335 the main function being self testing of the device

Abstract

A self testing fault detector having a line side and a load side and a conductive path there between. The apparatus includes a solenoid, which is adapted to move a plurality of contacts disposed in the conductive path from a first position to a second position when the self testing device is powered from the line side; and a processor, which is adapted to energize the solenoid using a first switch and maintain said solenoid in the energized state using a second switch.

Claims

1. A self testing fault detector and interrupter having a line side and a load side and a conductive path therebetween, said apparatus comprising:

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position to a second position when said self testing fault detector is powered from the line side;

a programmable processor programmed to energize said solenoid by activating a first switch using a first output thereof for a selected period of time determined by the processor and to maintain said solenoid in said energized state by activating a second switch using a second output thereof after said selected period of time has elapsed and deactivating said first switch; and

a Ground Fault Circuit Interrupter (GFCI) chip, configured to detect an occurrence of a ground fault, and having an output to said second switch to control deenergization of said solenoid independently of the processor when a fault condition is detected.

2. The self testing fault detector of claim 1, wherein said first switch and said second switch are transistors, said first switch comprising a first terminal connected to the first output and a second terminal thereof connected to the solenoid, and said second switch comprising a third terminal connected to the second output and a fourth terminal thereof connected to the solenoid.

3. The self testing fault detector of claim 1, wherein said second switch comprises a Darlington transistor.

4. The self testing fault detector of claim 1, wherein said first switch is activated for about 10 ms, said second switch is activated and said first switch is deactivated.

5. The self testing fault detector of claim 1, wherein said programmable processor performs a periodic test.

6. The self testing fault detector of claim 5, wherein said programmable processor performs at least one of said test at one minute intervals and daily intervals.

7. The self testing fault detector of claim 5, wherein said periodic test detects at least one of electrical functionality and mechanical functionality of said self testing fault detector.

8. The self testing fault detector of claim 1, further including an alarm indicator.

9. The self testing fault detector of claim 8, wherein said alarm indicator includes a green LED to indicate normal operation of said self testing fault detector.

10. The self testing fault detector of claim 8, wherein said alarm indicator includes a red LED to indicate at least one of three conditions.

11. The self testing fault detector of claim 10, wherein said three conditions comprise at least one of a trip condition, a receptacle mode of operation, and a power denial to load state.

12. The self testing fault detector of claim 8, wherein said processor powers said alarm indicator.

13. The self testing fault detector of claim 8, wherein said alarm indicator comprises a power indicator.

14. The self testing fault detector of claim 1, wherein said first position comprises an open position and said second position comprises a closed position.

15. The self testing fault detector of claim 1, wherein said self testing fault detector comprises at least one of an arc fault circuit interrupter and ground fault circuit interrupter.

16. The self testing fault detector of claim 1, wherein the programmed processor is programmed to maintain said solenoid in the deenergized state by deactivating said second switch when said programmed processor detects that said plurality of contacts are in said first position.

17. The self testing fault detector of claim 1, wherein the GFCI chip comprises a dual function regulator adapted to perform powering internal circuitry of the GFCI chip and powering the processor.

18. A self testing fault interrupter apparatus having line terminals and load terminals and a conductive path therebetween, said apparatus comprising:

a fault sensing transformer, adapted to detect a fault condition in said conductive path;

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position when said solenoid is deenergized or to a second position when said solenoid is energized;

a microprocessor; and

a fault detection chip comprising a first output connected to a switch circuit for the solenoid, and adapted to place said solenoid in an initial deenergized state and place said contacts in said first position independently of the microprocessor when a fault condition is detected by said fault sensing transformer;

wherein said microprocessor comprises a second output connected to the switch circuit for the solenoid, and is adapted to maintain said solenoid in a deenergized state when said microprocessor detects that said contacts are in said first position.

19. The self testing fault interrupter apparatus of claim 18, wherein said microprocessor is adapted to perform a periodic test.

20. The self testing fault interrupter apparatus of claim 18, wherein said microprocessor performs at least one of said test at one minute intervals and daily intervals.

21. The self testing fault interrupter apparatus of claim 19, wherein said periodic test detects at least one of electrical functionality and mechanical functionality of said self testing fault interrupter apparatus.

22. A self testing fault detector and interrupter having a line side and a load side and a conductive path therebetween, said apparatus comprising:

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position to a second position when said self testing fault detector and interrupter is powered from the line side; and

a processor, adapted to energize said solenoid using a first switch and to maintain said solenoid in said energized state using a second switch;

wherein said processor performs a periodic test, said periodic test detects at least one of electrical functionality and mechanical functionality of said self testing fault detector and interrupter and, if said self testing fault detector and interrupter is determined to be inoperable, said self testing fault detector and interrupter is configured to selectively operate in a power denial to load state and a receptacle mode of operation state depending on which state is selected, the receptacle mode of operation state corresponding to when power is provided to a load but said processor does not operate the solenoid to protect against a fault.

23. The self testing fault detector and interrupter of claim 22, further comprising a reset input device to reset the plurality of contacts to the second position from the first position, wherein selecting the receptacle mode of operation state comprises activating the reset input device following deenergization of said solenoid.

24. A self testing fault detector and interrupter having a line side and a load side and a conductive path therebetween, said apparatus comprising:

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position to a second position when said self testing fault detector and interrupter is powered from the line side;

a processor, adapted to energize said solenoid using a first switch and to maintain said solenoid in said energized state using a second switch; and

an alarm indicator;

wherein the alarm indicator comprises a red LED that flashes at a first rate when said self testing fault detector and interrupter is in a power denial to load state and at a second rate when said self testing fault detector is operating in a receptacle mode of operation depending on which state is selected, the receptacle mode of operation state corresponding to when power is provided to a load but said processor does not operate the solenoid to protect against a fault.

25. A self testing fault detector and interrupter having a line side and a load side and a conductive path therebetween, said apparatus comprising:

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position to a second position when said self testing fault detector and interrupter is powered from the line side;

a processor, adapted to energize said solenoid using a first switch and to maintain said solenoid in said energized state using a second switch;

wherein the plurality of contacts comprises a pair of primary contacts, a pair of auxiliary contacts and a pair of face contacts and the primary contacts are configured to be open when the auxiliary contacts are closed and to be closed when the auxiliary contacts are open; and

wherein said processor is programmed to perform a self-test by controlling the solenoid to deenergize, detecting when the primary contacts are open via closure of the auxiliary contacts, and maintaining the primary contacts open for a selected period of time to validate a selected signal generated when opening of the primary contacts while avoiding disruption operation of a load powered via the self testing fault detector and interrupter.

26. The self testing fault detector and interrupter of claim 25, wherein, during initial powering of the self testing fault detector and interrupter, the primary contacts are open and the auxiliary contacts are closed.

27. The self testing fault detector and interrupter of claim 25, wherein the primary contacts are closed and the auxiliary contacts are opened during initial powering of the self testing fault detector after the processor detects that the primary contacts are open and the auxiliary contacts are closed.

28. A line powered self testing fault protection device having a line side and a load side and a conductive path therebetween, said apparatus comprising:

a solenoid, adapted to move a plurality of contacts disposed in said conductive path from a first position to a second position;

a fault detector, adapted to energize said solenoid to place said contacts in said first position;

a processor, adapted to energize said solenoid to place said contacts in said second position via a switch; and

an alarm indicator, adapted to indicate at least one of a presence of a fault, a presence of electrical power on the line side of said line powered self testing fault protection device, and an operational state of said line powered self testing fault protection device;

wherein said operational state comprises a receptacle mode corresponding to when power is provided to a load but said processor does not operate the solenoid to protect against a fault.