Compensation for voltage drop in automatic test equipment

• US 7,737,715 B2
• Filed: 07/19/2007
• Issued: 06/15/2010
• Est. Priority Date: 07/31/2006
• Status: Active Grant

• Current Assignee: Marvell Israel MISL Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell Israel MISL Limited (Marvell Technology Group Limited)
• Inventors: Weisblum, Mordechay, Grinfeld, Michael, Tilbor, Eran
• Primary Examiner(s): Nguyen; Ha Tran T
• Assistant Examiner(s): Rodas; Richard Isla
• Application Number:
  US11/780,395
• Publication Number:
  US 20080024159A1
• Time in Patent Office: 1,062 Days
• Field of Search: 324754-765, 324/158.1
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/2841 Signal generators
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence

Abstract

Providing reliable testing of a device under test (DUT) by compensating for a reduced voltage inside the device without changing the internal circuitry of the device. The DUT has multiple connection terminals for connecting to the test equipment including at least first and second power connection terminals that both connect to an internal power bus of the DUT. An adapter board connects to the multiple connection terminals of the DUT via a removably attachable socket which holds the DUT. A tester supplies power to the DUT through the adapter board. The adapter board is configured to supply power from the tester to the DUT through the first power connection terminal and to monitor voltage at the second power connection terminal. The tester includes a compensation unit which controls power based on the voltage monitored at the second power connection terminal.

Claims

1. Test equipment for a device under test (DUT), comprising:

an adapter board configured to connect to multiple connection terminals of the DUT via a removably attachable socket which holds the DUT;

a tester which sends and receives test signals to the DUT through the adapter board and which supplies power to the DUT through the adapter board;

wherein an internal power bus of the DUT comprises a Vdd component and a Vss component, wherein one of at least two power connection terminals of the DUT connects to the Vdd component and another of the at least two power connection terminals connect to the Vss component, and wherein one of another at least two power connection terminals of the DUT connects to the Vss component and another of the another at least two power connection terminals connect to the Vdd component;

wherein, the adapter board supplies power from the tester to the DUT through the at least two power connection terminals of the DUT and monitors voltage at the another at least two power connection terminals of the DUT; and

wherein, the tester includes a compensation unit which controls the power supplied to the DUT based on the voltage monitored at the another at least two power connection terminals.

2. The test equipment according to claim 1, wherein the adapter board is configured to monitor the voltage through a buffer so that voltage noise is reduced.

3. The test equipment according to claim 2, wherein the buffer is a low pass filter.

4. The test equipment according to claim 1, wherein the test equipment operates in a pre-test mode and a test mode, and power is only controlled in pre-test mode and power is fixed for executing the test mode.

5. The test equipment according to claim 4, wherein the test equipment switches from the pre-test mode to the test mode when power supplied to the DUT is sufficient so that the voltage monitored at the another at least two power connection terminals is within a range of acceptable voltage values in relation to a target voltage.

6. The test equipment according to claim 4, wherein the multiple connection terminals include multiple signal connection terminals, and the test equipment performs testing in the test mode by supplying an input signal to the DUT through an input signal connection terminal, extracting an output signal from the DUT through an output signal connection terminal, and comparing the value of the output signal to a value in a test specification.

7. The test equipment according to claim 1, wherein the DUT is an application specific integrated circuit (ASIC).

8. A method for testing an electronic device under test (DUT), wherein the DUT has multiple connection terminals for connecting to a test equipment, the multiple connection terminals including power connection terminals that connect to an internal power bus of the DUT, wherein the internal power bus comprises a Vdd component and a Vss component, the test equipment comprising an adapter board and a tester that includes a compensation unit, the method comprising:

supplying power to first and second power connection terminals of the internal bus of the DUT using the test equipment, the first power connection terminal connected to the Vdd component, and the second connection terminal connected to the Vss component;

monitoring a voltage level at third and fourth power connection terminals of the internal power bus, the third power connection terminal connected to the Vdd component, and the fourth connection terminal connected to the Vss component;

controlling power supplied to the first and second power connection terminals based on the voltage level monitored at the third and fourth power connection terminals;

wherein, the adapter board supplies power from the tester to the DUT through the first and second power connection terminals and monitors voltage at the third and fourth power connection terminals; and

wherein, the compensation unit controls power based on the voltage monitored at the third and fourth power connection terminals.

9. The method according to claim 8, wherein the test equipment is configured to monitor the voltage through a buffer so that voltage noise is reduced.

10. The method according to claim 9, wherein the buffer is a low pass filter.

11. The method according to claim 8, wherein the test equipment operates in a pre-test mode and a test mode, and power is only controlled in pre-test mode and power is fixed for executing during test mode.

12. The method according to claim 11, wherein the test equipment switches from the pre-test mode to the test mode when power supplied to the DUT is sufficient so that the voltage monitored at the third and fourth power connection terminals is within a range of acceptable voltage values in relation to a target voltage.

13. The method according to claim 11, wherein the multiple connection terminals include multiple signal connection terminals, and the test equipment performs testing in the test mode by supplying an input signal to the DUT through an input signal connection terminal, extracting an output signal from the DUT through an output signal connection terminal, and comparing the value of the output signal to a value in a test specification.

14. The method according to claim 8, wherein the DUT is an application specific integrated circuit (ASIC).