MCU with integrated voltage isolator to provide a galvanic isolation between input and output
First Claim
Patent Images
1. An integrated circuit, comprising:
- a first microcontroller unit located on a first die including a first processing core for providing a parallel stream of data;
a second microcontroller unit located on a second die including a second processing core for receiving the parallel stream of data;
the first die galvanically isolated from the second die; and
voltage isolation circuitry located on each of the first and second dies for transmitting data from the parallel data stream between the first microcontroller unit and the second microcontroller unit in a serial data stream and maintaining the galvanic isolation between the first microcontroller unit and the second microcontroller unit, the voltage isolation circuitry distributing a first portion of a high voltage isolation signal across a first portion of a galvanically isolated link associated with the first microcontroller unit and distributing a second portion of the high voltage isolation signal across a second portion of the galvanically isolated link associated with the second microcontroller unit.
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Abstract
An integrated circuit comprises a first microcontroller unit located on a first die. The first microcontroller unit includes a first processing core for providing a parallel stream of data. A second microcontroller unit is located on a second die and includes a second processing core for receiving the parallel stream of data. Voltage isolation circuitry transmits data from the parallel data stream between the first microcontroller and the second microcontroller in a serial data stream and provides galvanic isolation between the first microcontroller unit and the second microcontroller unit.
216 Citations
29 Claims
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1. An integrated circuit, comprising:
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a first microcontroller unit located on a first die including a first processing core for providing a parallel stream of data; a second microcontroller unit located on a second die including a second processing core for receiving the parallel stream of data; the first die galvanically isolated from the second die; and voltage isolation circuitry located on each of the first and second dies for transmitting data from the parallel data stream between the first microcontroller unit and the second microcontroller unit in a serial data stream and maintaining the galvanic isolation between the first microcontroller unit and the second microcontroller unit, the voltage isolation circuitry distributing a first portion of a high voltage isolation signal across a first portion of a galvanically isolated link associated with the first microcontroller unit and distributing a second portion of the high voltage isolation signal across a second portion of the galvanically isolated link associated with the second microcontroller unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An integrated circuit, comprising:
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a first microcontroller unit located on a first die including a first processing core for providing a parallel stream of data; a second microcontroller unit located on a second die including a second processing core for receiving the parallel stream of data; the first die galvanically isolated from the second die; capacitive isolation circuitry connected with the first microcontroller unit and a second microcontroller unit for providing a high voltage isolation link between the first and the second microcontroller units, the capacitive isolation circuitry distributing a first portion of a high voltage isolation signal across a first group of capacitors associated with the first microcontroller unit and distributing a second portion of the high voltage isolation signal across a second group of capacitors associated with the second microcontroller unit. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An integrated circuit, comprising:
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a first microcontroller unit located on a first die including a first processing core for processing a parallel stream of data; a second microcontroller unit located on a second die including a second processing core for processing a parallel stream of data; the first die galvanically isolated from the second die; first transceiver circuitry located on the first die for converting between the parallel data stream and a serial data stream; second transceiver circuitry located on the second die for converting between the parallel data stream and a serial data stream; and capacitive isolation circuitry for bidirectionally transmitting serial data between the first and second transceiver circuitry to provide a galvanic isolation link therebetween, such that data from the parallel data streams for the first microcontroller unit and the second microcontroller unit can be transmitted therebetween. - View Dependent Claims (18, 19, 20, 21, 22)
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23. An integrated circuit, comprising:
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a microcontroller unit located on a first die in a semiconductor package including a first processing core for providing a parallel stream of data; a second die disposed in the semiconductor package; the first die galvanically isolated from the second die; and voltage isolation circuitry located on each of the first and second dies for transmitting parallel data between the microcontroller unit on the first die and the second die across a galvanic isolation link between the first die and the second die as a serial data stream, the voltage isolation circuitry distributing a first portion of a high voltage isolation signal across a first portion of the galvanic isolation link associated with the first die and distributing a second portion of the high voltage isolation signal across a second portion of the galvanic isolation link associated with the second die. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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Specification