Systems and methods for power conservation in a CMOS imager

• US 7,738,013 B2
• Filed: 04/06/2004
• Issued: 06/15/2010
• Est. Priority Date: 05/29/2001
• Status: Active Grant

• Current Assignee: Transchip Israel Limited
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Galambos, Tiberiu, Furman, Ben, Fraenkel, Miriam
• Primary Examiner(s): Tran; Nhan T
• Application Number:
  US10/819,897
• Publication Number:
  US 20040233324A1
• Time in Patent Office: 2,261 Days
• Field of Search: 348/222.1, 348/308, 348/273, 348/241, 348/243, 348/229.1
• US Class Current: 348/222.1
• CPC Class Codes: H04N 23/651 for reducing power consumption by affecting camera operations, e.g. sleep mode, hibernation mode or power off of selective parts of the camera
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/709 Circuitry for control of the power supply

Abstract

The present invention provides systems and methods capable of reducing power consumption in an imaging device. One imaging device includes two analog to digital converters that are separately programmable and can be in different power modes. Each analog to digital converter is capable of creating an image derived from a pixel array that has a full field of view, but lower resolution.

Claims

1. An imaging system for electronically capturing optical images comprising:

a pixel array including,

a first pixel group associated with a first portion of an optical image and a first signal, the first pixel group including color components of at least three different colors, and

a second pixel group associated with a second portion of the optical image and a second signal, the second pixel group including color components of at least the three different colors;

a digital conversion system including,

a first digital conversion subsystem, including a first level shift function configured to receive the first signal, a first black offset function, a first gain function and a first analog to digital converter configured to convert the first signal to a first digital signal, and

a second digital conversion subsystem, including a second level shift function configured to receive the second signal, a second black offset function, a second gain function and a second analog to digital converter configured to convert the second signal to a second digital signal, wherein

each of the first and second digital conversion subsystems are configured to operate in a first or second power mode, the first power mode consuming more power than the second power mode.

2. The imaging system of claim 1, further comprising:

at least a third digital conversion subsystem.

3. The imaging system of claim 1, wherein the first analog to digital converter is configured to operate in the first power mode, while, the second analog to digital converter is configured to operate in the second power mode.

4. The imaging system of claim 1, further comprising:

a programmable control network operable to place the first analog to digital converter in the first power mode, and place the second analog to digital converter in the second power mode.

5. The imaging system of claim 1, further comprising:

a digital processing system, configured to process at least one of the first digital signal and the second digital signal to generate a unified digital image.

6. The imaging system for of claim 1, wherein in the second power mode, the second analog to digital converter consumes no more than sixty percent of an amount of power consumed by the second analog to digital converter in the first power mode.

7. The imaging system of claim 1, wherein a digital image produced by the imaging system in the second mode is one quarter a maximum size.

8. The imaging system of claim 1, wherein a digital image produced by the imaging system in the second power mode is less than a maximum size.

9. The imaging system of claim 1, wherein a digital image produced by the imaging system is digitally sub-sampled in a horizontal or a vertical direction.

10. The imaging system of claim 1, further comprising:

a clock associated with one of the first and second analog to digital converters and having a speed to decrease a resolution of images produced by the imaging system in a predetermined mode.

11. The imaging system of claim 1, wherein the first analog to digital converter, the second analog to digital converter, and the pixel array are implemented on a single CMOS chip.

12. A method for acquiring an image with a CMOS imaging array comprising:

generating a first analog signal representative of a first subset of pixels from the CMOS imaging array, the first subset of pixels including color components of at least three different colors;

processing the first analog signal using a first level shift function configured to receive the first signal, a first black offset function and a first gain function;

converting the first analog signal into first digital data;

generating a second analog signal representative of a second subset of pixels from the CMOS imaging array, the second subset of pixels including color components of at least the three different colors; and

processing the second analog signal using a second level shift function configured to receive the second signal, a second black offset function and a second gain function;

selectively converting the second analog signal into second digital data when a first power mode is selected.

13. The method of claim 12, wherein the first digital data generates a full color portion of a processed image.

14. The method of claim 12, wherein geometric dimensions for the first subset of pixels are equal to geometric dimensions of the second subset of pixels.

15. The method of claim 12, further comprising:

generating a third analog signal representative of a third subset of pixels from the CMOS imaging array.

16. The method of claim 12, wherein the first subset of pixels includes a plurality of pixels in a horizontal axis and a vertical axis.

17. The method of claim 12, wherein a size of the first subset of pixels is reduced in a second power mode.

18. An imaging system for electronically capturing optical images, the imaging system comprising:

a pixel array including,

a first pixel configured to provide a first analog signal associated with a first portion of an image, and

a second pixel configured to provide a second analog signal associated with a second portion of the image;

a digital conversion system including,

a first digital conversion subsystem, including a first level shift function configured to receive the first signal, a first black offset function, a first gain function and a first analog to digital converter configured to convert the first analog signal to a first digital signal representative of color components of at least three different colors, the first digital signal being configured to generate a portion of a processed image including the three different colors;

a second digital conversion subsystem, including a second level shift function configured to receive the second signal, a second black offset function, a second gain function and a second analog to digital converter configured to convert the second analog signal to a second digital signal representative of color components of at least the three different colors; and

the second analog to digital converter being configured to be put into a reduced power mode when the first analog to digital converter is not in the reduced power mode.

19. The imaging system of claim 18, further comprising:

at least a third analog to digital converter configured to convert a plurality of pixels in the pixel array.

20. The imaging system for of claim 18, wherein an optical image is produced in the reduced power mode with a full field of view, but reduced resolution.