System and method for multi-precision division
First Claim
1. A method for multi-precision division, comprising:
- generating a first product using an integrated circuit by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus;
generating the 1'"'"'s complement of the first product using said integrated circuit;
generating a second product by multiplying the 1'"'"'s complement and the quotient approximation using said integrated circuit;
normalizing and truncating the second product to obtain a quotient using said integrated circuit; and
storing the quotient in memory.
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Accused Products
Abstract
The present disclosure provides a system and method for performing multi-precision division. A method according to one embodiment may include generating a first product by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus. The method may also include generating the 1'"'"'s complement of the first product, generating a second product by multiplying the 1'"'"'s complement and the quotient approximation, normalizing and truncating the second product to obtain a quotient, and storing the quotient in memory. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.
23 Citations
26 Claims
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1. A method for multi-precision division, comprising:
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generating a first product using an integrated circuit by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus; generating the 1'"'"'s complement of the first product using said integrated circuit; generating a second product by multiplying the 1'"'"'s complement and the quotient approximation using said integrated circuit; normalizing and truncating the second product to obtain a quotient using said integrated circuit; and storing the quotient in memory. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An apparatus, comprising:
an integrated circuit (IC) configured to generate a first product by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus, generate the 1'"'"'s complement of the first product;
generate a second product by multiplying the 1'"'"'s complement and the quotient approximation, normalize and truncate the second product to obtain a quotient, and store the quotient in memory.- View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A computer readable storage medium comprising instructions stored thereon that when executed by a computer result in the following:
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generating a first product by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus; generating the 1'"'"'s complement of the first product; generating a second product by multiplying the 1'"'"'s complement and the quotient approximation; normalizing and truncating the second product to obtain a quotient; and storing the quotient in memory. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A system comprising:
a plurality of line cards and a switch fabric interconnecting said plurality of line cards, at least one line card comprising; at least one physical layer component (PHY); and an integrated circuit (IC) configured to generate a first product by multiplying a modulus having a most significant bit and/or a least significant bit equal to one and a quotient approximation of the modulus, generate the 1'"'"'s complement of the first product;
generate a second product by multiplying the 1'"'"'s complement and the quotient approximation, normalize and truncate the second product to obtain a quotient, and store the quotient in memory.- View Dependent Claims (21, 22, 23, 24, 25, 26)
Specification