Semiconductor device and program data redundancy method therefor

• US 7,739,559 B2
• Filed: 05/30/2006
• Issued: 06/15/2010
• Est. Priority Date: 05/30/2005
• Status: Active Grant

• Current Assignee: Valley Device Management
• Original Assignee: Spansion LLC (Infineon Technologies AG)
• Inventors: Niimi, Makoto, Suzuki, Norikatsu, Kawamoto, Satoru
• Primary Examiner(s): Chung; Phung M
• Application Number:
  US11/444,251
• Publication Number:
  US 20060291305A1
• Time in Patent Office: 1,477 Days
• Field of Search: 714/710, 714/718, 714/38, 714/7, 714/725, 365/200, 365/201
• US Class Current: 714/710
• CPC Class Codes: G11C 29/76 using address translation or modifications

Abstract

A semiconductor device (1) is provided which includes a regular cell array unit (30), a redundant cell array unit (31) that is provided in relation to the regular cell array unit (30), and a PGM/ER state machine (20) that controls reprogramming in which, when programming of a sector in the regular cell array unit fails (step S3), data involved in the programming that fails and data already stored in the sector in the regular cell array unit are written (step S8) into the redundant cell array unit (31). Since reprogramming is performed to write the data already written in the sector as well as the data involved in the programming that fails into the redundant cell array unit (31), data loss can be prevented and data can be secured, thereby increasing the reliability of the system.

Claims

1. A semiconductor device comprising:

a regular cell array region comprising one or more sectors, each of the one or more sectors comprising a first plurality of memory cells;

a redundant cell array region comprising a second plurality of memory cells; and

a write control unit coupled to the regular cell array region and the redundant cell array region, wherein the write control unit controls programming of the one or more sectors of the regular cell array region and, when programming of one of the one or more sectors of the regular cell array region fails, both first data being data that is being programmed into the one of the one or more sectors when the programming thereof fails and second data being data that is already stored in the one of the one or more sectors of the regular cell array region are written into a portion of the second plurality of memory cells of the redundant cell array region.

2. The semiconductor device as claimed in claim 1, wherein the write control unit initializes a sector of the redundant cell array region and writes the second data into the sector of the redundant cell array region prior to the reprogramming.

3. The semiconductor device as claimed in claim 2, wherein the write control unit does not initialize the sector of the redundant cell array region when the sector of the redundant cell array region is already in an initialized state.

4. The semiconductor device as claimed in claim 1, further comprising:

a first memory part storing information indicating whether each sector of the redundant cell array region is in use; and

a search control unit coupled to the first memory part and searching the first memory part and detecting whether a sector of the redundant cell array region is in use or not in use, wherein the write control unit is coupled to the search control unit and writes the second data into a sector detected by the search control unit as not in use.

5. The semiconductor device as claimed in claim 4, wherein the first memory part comprises a first region storing information indicating whether each sector of the redundant cell array region are in use, and a second region storing information indicating whether each sector of the redundant cell array region are in use as spare regions for aid in recovery from a programming error.

6. The semiconductor device as claimed in claim 1, further comprising a second memory part storing information identifying a relationship between a sector number of the one of the one or more sectors of the regular cell array region for which the programming thereof failed and a sector number of a sector in the redundant cell array region wherein the first data and the second data are written.

7. The semiconductor device as claimed in claim 4, wherein the search control unit outputs an error signal to a controller coupled to and controlling the semiconductor device in response to the search control unit not detecting any sector in the redundant cell array region that is not in use.

8. The semiconductor device as claimed in claim 1, further comprising a data storage unit that stores the first data when programming the one of the one or more sectors of the regular cell array region, wherein the write control unit reads the first data from the data storage unit and writes the first data read therefrom into the redundant cell array region when the programming of the one of the one or more sectors of the regular cell array region fails.

9. The semiconductor device as claimed in claim 8, further comprising a failure address register that stores an address of a memory cell of the one of the one or more sectors of the regular cell array region involved in the programming that fails, wherein the second data read by the write control unit from the one of the one or more sectors of the regular cell array region involved in the programming that fails is data stored at addresses other than the address stored in the failure address register, the write control unit writing the second data into the portion of the second plurality of memory cells of the redundant cell array region.

10. The semiconductor device as claimed in claim 1, wherein the write control unit outputs an error signal to a controller coupled to and controlling the semiconductor device in response to failure of reprogramming of either the first data or the second data into the redundant cell array region.

11. The semiconductor device as claimed in claim 10, wherein the write control unit outputs an error signal to the controller in response to an inquiry from the controller polling a state of the redundant cell array region.

12. A data redundancy programming method using a processor, comprising the steps of:

programming a sector in a regular cell array region of a semiconductor device;

determining in the processor when programming of the sector in the regular cell array fails; and

reprogramming the sector in the regular cell array region when the processor determines that programming of the sector in the regular cell array region failed, the reprogramming comprising;

writing a, first data being data involved in the programming that failed and a second data being data already stored in the sector in the regular cell array region into a redundant cell array region.

13. The data redundancy programming method in accordance with claim 12, further comprising the steps of:

initializing a sector in the redundant cell array region; and

writing the second data from the sector in the regular cell array region into the sector in the redundant cell array region prior to performing the reprogramming.

14. The data redundancy programming method in accordance with claim 13, wherein the step of initializing the sector in the redundant cell array region prior to performing the reprogramming comprises the steps of:

determining whether the sector in the redundant cell array region is in an initialized state;

initializing the sector in the redundant cell array region when determining that the sector in the redundant cell array region is not in an initialized state; and

not performing initializing of the sector in the redundant cell array region when determining that the sector in the redundant cell array region is already in an initialized state.

15. The data redundancy programming method in accordance with claim 12, further comprising the step of storing the first data in a data storage unit when the processor determines the programming of the sector in the regular cell array region failed, wherein the step of reprogramming farther comprises:

reading the first data from the data storage unit; and

writing the first data read from the data storage unit into the redundant cell array region.

16. The data redundancy programming method in accordance with claim 15, wherein the step of reprogramming further comprises:

writing data involved in the programming that failed into the redundant cell array region;

storing, in a failure address register, an address of a memory cell in the sector of the regular cell array region that is involved in the programming that failed;

comparing the address of the memory cell stored in the failure address register with an address of each memory cell of the sector of the regular cell array region; and

writing the data already stored in the sector of the regular cell array region into the redundant cell array region in response to results of the comparing step.

17. The data redundancy programming method in accordance with claim 12, further comprising the step of outputting an error signal from the processor to a controller that controls the semiconductor device in response to reprogramming of the redundant cell array region with the first data or the second data fails.

18. The data redundancy programming method in accordance with claim 12, further comprising the step of generating a record of recovery in the processor from a program error in response to the reprogramming step being successful.