×

Solid state power control and method for reducing control power

  • US 7,741,737 B2
  • Filed: 05/09/2006
  • Issued: 06/22/2010
  • Est. Priority Date: 05/09/2006
  • Status: Active Grant
First Claim
Patent Images

1. A solid state power control apparatus comprising:

  • a switch;

    a microcontroller that controls the switch and receives communication signals, the microcontroller having an active state and a sleep state, wherein the sleep state corresponds to interruption of the communication signals for a predetermined time period;

    a first, operation microprocessor operable to control operation of the solid state power control; and

    a second, status microprocessor operable to communicate with the microcontroller to control a status of the solid state power control, wherein the microcontroller receives the communication signals from each of the first microprocessor and the second microprocessor.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×