Semiconductor device and electronic device
First Claim
Patent Images
1. A semiconductor device comprising:
- a word line;
a first bit line and a second bit line;
a first memory cell electrically connected to the word line and the first bit line;
a second memory cell electrically connected to the word line and the second bit line;
a first switching element including a first terminal electrically connected to the first bit line;
a second switching element including a first terminal electrically connected to the second bit line;
a first precharge circuit configured to output a precharge potential to the first bit line, wherein the first precharge circuit is electrically connected to the first bit line through the first switching element;
a second precharge circuit configured to output a precharge potential to the second bit line, wherein the second precharge circuit is electrically connected to the second bit line through the second switching element; and
a circuit configured to operate the first switching element and the second switching element selectively.
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Abstract
In relation to reading of data in a memory, it is an object to provide a semiconductor device mounted with a low power consumption memory. A semiconductor device including a word line, a bit line, and a memory cell electrically connected to the word line and the bit line, further includes a precharge circuit for making the bit line have an electric potential for reading data stored in the memory cell. The precharge circuit is provided for each bit line and connected to the bit line. Further, the precharge circuit is capable of making each bit line have an electric potential for reading the data stored in the memory cell for each bit line.
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Citations
20 Claims
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1. A semiconductor device comprising:
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a word line; a first bit line and a second bit line; a first memory cell electrically connected to the word line and the first bit line; a second memory cell electrically connected to the word line and the second bit line; a first switching element including a first terminal electrically connected to the first bit line; a second switching element including a first terminal electrically connected to the second bit line; a first precharge circuit configured to output a precharge potential to the first bit line, wherein the first precharge circuit is electrically connected to the first bit line through the first switching element; a second precharge circuit configured to output a precharge potential to the second bit line, wherein the second precharge circuit is electrically connected to the second bit line through the second switching element; and a circuit configured to operate the first switching element and the second switching element selectively. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device comprising:
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a modulating circuit; a demodulating circuit; an antenna; a logic circuit; and a memory circuit including; a word line, a first bit line and a second bit line, a first memory cell electrically connected to the word line and the first bit line, a second memory cell electrically connected to the word line and the second bit line, a first switching element including a first terminal electrically connected to the first bit line, a second switching element including a first terminal electrically connected to the second bit line, a first pre charge circuit configured to output a pre charge potential to the first bit line, wherein the first precharge circuit is electrically connected to the first bit line through the first switching element, a second precharge circuit configured to output a precharge potential to the second bit line, wherein the second precharge circuit is electrically connected to the second bit line through the second switching element, and a circuit configured to operate the first switching element and the second switching element selectively. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification