Method and system for optimizing filter compensation coefficients for a digital power control system

• US 7,743,266 B2
• Filed: 07/23/2007
• Issued: 06/22/2010
• Est. Priority Date: 12/21/2002
• Status: Active Grant

• Current Assignee: Bel Power Solutions Inc.
• Original Assignee: Power-One Incorporated (ABB Limited)
• Inventors: Chapuis, Alain
• Primary Examiner(s): Lee; Thomas
• Assistant Examiner(s): Rahman; Fahmida
• Application Number:
  US11/781,878
• Publication Number:
  US 20080010474A1
• Time in Patent Office: 1,065 Days
• Field of Search: 713/300, 713/310, 713320-324, 713330-340, 323/234
• US Class Current: 713/300
• CPC Class Codes: H02M 3/157 with digital control

Abstract

A method and system is provided for optimizing the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. A power control system comprises at least one point-of-load (POL) regulator having a power conversion circuit adapted to convey power to a load and a digital controller coupled to the power conversion circuit though a feedback loop. The digital controller is adapted to provide a pulse width modulated control signal to the power switch responsive to a feedback measurement of an output of the power conversion circuit. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. The digital controller periodically stores a successive one of a plurality of samples of the feedback measurement. A serial data bus operatively connects the POL regulator to a system controller. The system controller retrieves each successive stored sample from the digital controller via the serial data bus. After retrieving a pre-determined number of the samples, the system controller calculates optimized filter coefficients for the digital filter and communicates the optimized filter coefficients to the digital controller. The digital controller thereafter uses the optimized filter coefficients in the digital filter.

Claims

1. A power control system comprising:

at least one point-of-load (POL) regulator having a power conversion circuit configured to convey power to a load and a digital controller coupled to the power conversion circuit through a feedback loop, the digital controller being configured to provide a pulse width modulated control signal to said power conversion circuit responsive to a feedback measurement from an output of the power conversion circuit, said digital controller further comprising a digital filter having a transfer function defined by plural filter coefficients, the digital controller periodically storing a successive one of a plurality of samples of said feedback measurement;

a serial data bus operatively connected to said at least one POL regulator; and

a system controller connected to said serial data bus and configured to communicate with said at least one POL regulator via said serial data bus, said system controller retrieving each said successive stored sample from said digital controller via said serial data bus;

wherein, after retrieving a pre-determined number of said samples, said system controller uses at least a portion of said pre-determined number of said samples to calculate optimized filter coefficients for said digital filter and communicates said optimized filter coefficients to said digital controller via said serial data bus, said digital controller thereafter using said optimized filter coefficients in said digital filter.

2. The power control system of claim 1, wherein said digital controller further comprises a noise source configured to periodically inject a symmetrical noise signal into said pulse width modulated control signal.

3. The power control system of claim 2, wherein said symmetrical noise signal further comprises a pseudo-random binary sequence.

4. The power control system of claim 3, wherein said pre-determined number of samples corresponds to a sequence length of said pseudo-random binary sequence.

5. The power control system of claim 1, wherein said digital controller further comprises a register configured to store the successive samples of said feedback measurement.

6. The power control system of claim 1, wherein said system controller includes a memory array configured to store the samples retrieved from the digital controller.

7. The power control system of claim 1, wherein the system controller is configured to calculate an open loop transfer function of the feedback loop based on the samples retrieved from the digital controller.

8. The power control system of claim 1, wherein the system controller is configured to calculate the transfer function of the power conversion circuit based on the samples retrieved from the digital controller.

9. The power control system of claim 7, wherein the system controller calculates the optimized filter coefficients based on the open loop transfer function of the feedback lop.

10. The power control system of claim 8, wherein the system controller calculates the optimized filter coefficients based on the transfer function of the power conversion circuit.

11. The power control system of claim 1, wherein said digital controller further comprises:

an analog-to-digital converter providing a digital error signal representing a difference between the output of the power conversion circuit and a reference, said digital error signal providing said feedback measurement; and

a digital pulse width modulator providing said pulse width modulated control signal.

12. The power control system of claim 1, wherein the said digital controller further comprises:

an analog-to-digital converter providing an absolute digital representation of the output of the power conversion circuit, a digital subtractor generating a digital error signal representing a difference between said digital output representation and a digital reference, said digital error signal providing said feedback measurement; and

a digital pulse width modulator providing said pulse width modulated control signal.

13. The power control system of claim 1, wherein said digital filter further comprises an infinite impulse response filter.

14. The power control system of claim 13, wherein said infinite impulse response filter provides the following transfer function G(z):

15. The power control system of claim 1, wherein said power conversion circuit further comprises at least one power switch.

16. A method of controlling at least one point-of-load (POL) regulator coupled to a system controller via a common data bus, the at least one POL regulator having a power conversion circuit configured to convey power to a load and a digital controller coupled to the power conversion circuit in a feedback loop, the digital controller being configured to provide a pulse width modulated control signal to said power conversion circuit responsive to a voltage error measurement, said digital controller further comprising a digital filter having a transfer function defined by plural filter coefficients, the method comprising:

injecting a symmetric noise signal into the pulse width modulated control signal for a predetermined period of time;

storing a sample of the voltage error measurement after allowing sufficient time for the noise signal to settle;

transmitting said sample via the common data bus to the system controller;

repeating the injecting, storing, and transmitting steps a predetermined number of times corresponding to a characteristic of the noise signal;

calculating a transfer function for the feedback loop based on plural ones of said samples;

calculating optimal filter coefficients based on the calculated feedback loop transfer function;

transmitting said optimal filter coefficients to said at least one POL regulator via the common data bus; and

programming said digital filter using said optimal filter coefficients.

17. The method of claim 16, wherein said injecting step further comprises injecting a pseudo-random binary sequence signal into the pulse width modulated control signal.

18. The method of claim 17, wherein the repeating step further comprises repeating the injecting, storing, and transmitting steps a number of times corresponding to a sequence length of said pseudo-random binary sequence.

19. The method of claim 16, wherein said calculating a transfer function further comprises cross-correlating the samples with the noise signal, and transforming the cross-correlation result in frequency domain using a Fourier transform.

20. The method of claim 16, further comprising calculating a transfer function of the power conversion circuit based on plural ones of said samples.