Method and circuit arrangement for holding a control state during inadequate power supply in an RF transponder or remote sensor

• US 7,746,216 B2
• Filed: 02/14/2005
• Issued: 06/29/2010
• Est. Priority Date: 02/13/2004
• Status: Active Grant

• Current Assignee: Arigna Technology Limited (Atlantic IP Services Limited)
• Original Assignee: Atmel Automotive GmbH (Microchip Technology Incorporated)
• Inventors: Ziebertz, Dirk
• Primary Examiner(s): Zimmerman; Brian A
• Assistant Examiner(s): Syed; Nabil H
• Application Number:
  US11/058,056
• Publication Number:
  US 20050179520A1
• Time in Patent Office: 1,961 Days
• Field of Search: 340/10.34, 340/7.32, 340/825.54, 340/10.1, 340/572.7, 340/10.3, 340/572.1, 340/10.2, 455/83
• US Class Current: 340/10.34
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Abstract

An RF transponder includes an input circuit, a read/memory circuit, and a circuit arrangement for holding a control state. The circuit arrangement includes a first storage device (e.g. a D-flip-flop) for storing the control state dependent on received control signals, and a second storage device (e.g. a capacitor and a transistor) for holding the control state during a period of inadequate energy supply to the circuit arrangement, e.g. while the transponder is in a field gap of the electromagnetic field emitted by a base station with which the transponder communicates. In an operating method, the control state is held by the second storage device during a period of inadequate energy supply. Then, when adequate energy is again supplied, the transponder resumes the control state that was held by the second storage device. The transponder continues to operate properly according to an anti-collision procedure in a system of several transponders communicating individually with a base station.

Claims

1. A device comprising a circuit arrangement for an RF transponder, said circuit arrangement comprising:

at least one power input adapted to have electrical operating power applied thereto;

at least one control input adapted to have at least one electrical control signal applied thereto;

a first storage arrangement that is connected to said at least one control input to receive said at least one control signal, and that is adapted to produce and store a control state of said circuit arrangement in response to and dependent on said control signal when said operating power applied to said power input is at or above an adequate level;

a second storage arrangement that is connected to a first output of said first storage arrangement to receive said control state, and that is adapted to hold said control state at least temporarily when said operating power applied to said power input is below said adequate level; and

a signal output arrangement configured to receive an output of said second storage arrangement and a second output of said first storage arrangement, and to provide an output signal,

wherein the second output of said first storage arrangement is inverted with respect to the at least one control signal.

2. The device according to claim 1, wherein said first storage arrangement comprises a switchable logic storage device that is switchable between two logic values of said control state in response to and dependent on said control signal.

3. The device according to claim 1, wherein said first storage arrangement comprises a D-flip-flop.

4. The device according to claim 1, wherein said second storage arrangement is adapted to hold said control state temporarily for a holding time t, with 0<

t<

tmax, following a time when said operating power falls below said adequate level.

5. The device according to claim 4, wherein said tmax is equal to 9 seconds.

6. The device according to claim 4, wherein said holding time t is equal to 2 seconds.

7. The device according to claim 4, wherein said holding time t is equal to 9 seconds.

8. The device according to claim 1, wherein said second storage arrangement is adapted to store electrical energy.

9. The device according to claim 1, wherein said second storage arrangement comprises a capacitor connected to said first output of said first storage arrangement.

10. The device according to claim 9, wherein said capacitor is connected between said first output of said first storage arrangement and a reference voltage terminal, and wherein said circuit arrangement further comprises a first transistor having a controlled conduction path connected parallel to said capacitor.

11. The device according to claim 10, wherein said device further comprises an input circuit including an input element adapted to receive an input signal, a Schottky diode and an inverter connected in parallel to an output of said input element, a second transistor having a control electrode connected to an output of said inverter and a controlled conduction path connected between an output of said Schottky diode and a reference voltage terminal, and an output terminal connected to said output of said Schottky diode;

and

wherein said output terminal of said input circuit is connected to a control electrode of said first transistor of said circuit arrangement.

12. The device according to claim 10, wherein:

said circuit arrangement further comprises an inverting switching stage and a NAND gate interposed between said signal output of said circuit arrangement and said output of said second storage arrangement;

said NAND gate has a first input connected to a second output of said first storage arrangement that is inverted relative to said first output of said first storage device;

said inverting switching stage is connected between a second input of said NAND gate and a common circuit node connected to said capacitor, said first transistor and said first output of said first storage arrangement;

said common circuit node forms said output of said second storage arrangement; and

said NAND gate further has an output connected to said signal output of said circuit arrangement.

13. The device according to claim 1, further comprising a receiver arrangement that is adapted to receive an RF electromagnetic wave carrying a control command, and adapted to extract said electrical operating power from said electromagnetic wave.

14. The device according to claim 13, wherein said device is an RF transponder.

15. The device according to claim 14, wherein said RF transponder further comprises a read/memory circuit connected to said at least one control input and said signal output of said circuit arrangement, and wherein said RF transponder is adapted to be controlled by a logic signal provided at said signal output of said circuit arrangement through said read/memory circuit.

17. The device according to claim 13, wherein said device is an RF remote sensor.

18. The device according to claim 17, wherein said RF remote sensor further comprises a read/sensor circuit connected to said at least one control input and said signal output of said circuit arrangement, and wherein said RF remote sensor is adapted to be controlled by a logic signal provided at said signal output of said circuit arrangement through said read/sensor circuit.

20. The device according to claim 1, wherein said device consists of said circuit arrangement.

25. The device according to claim 1, wherein said signal output is configured to provide an output signal to one or more entities outside said circuit arrangement based on said control state.

26. The device according to claim 1, wherein the output of said first storage arrangement is directly connected to the signal output arrangement.

27. The device according to claim 1, wherein the second storage arrangement includes a capacitor adapted to hold said control state and a transistor configured to discharge the capacitor on the basis of a status signal.

16. A system comprising a plurality of RF transponders each of said RF transponders comprising a circuit arrangement, said circuit arrangement comprising:

at least one power input adapted to have electrical operating power applied thereto;

at least one control input adapted to have at least one electrical control signal applied thereto;

a first storage arrangement that is connected to said at least one control input to receive said at least one control signal, and that is adapted to produce and store a control state of said circuit arrangement in response to and dependent an said control signal when said operating power applied to said power input is at or above an adequate level;

a second storage arrangement that is connected to a first output of said first storage arrangement to receive said control state, and that is adapted to hold said control state at least temporarily when said operating power applied to said power input is below said adequate level; and

a signal output arrangement configured to receive an output of said second storage arrangement and a second output of said first storage arrangement, and to provide an output signal, wherein the second output of said first storage arrangement is inverted with respect to the at least one control signal; and

a base station adapted to emit said RF electromagnetic wave.

19. A system comprising a plurality of RF remote sensors, each of said RF remote sensors comprising a circuit arrangement, said circuit arrangement comprising:

at least one power input adapted to have electrical operating power applied thereto;

at least one control input adapted to have at least one electrical control signal applied thereto;

a first storage arrangement that is connected to said at least one control input to receive said at least one control signal, and that is adapted to produce and store a control state of said circuit arrangement in response to and dependent on said control signal when said operating power applied to said power input is at or above an adequate level;

a second storage arrangement that is connected to a first output of said first storage arrangement to receive said control state, and that is adapted to hold said control state at least temporarily when said operating power applied to said power input is below said adequate level; and

a signal output arrangement configured to receive an output of said second storage arrangement and a second output of said first storage arrangement, and to provide an output signal, wherein the second output of said first storage arrangement is inverted with respect to the at least one control signal; and

a base station adapted to emit said RF electromagnetic wave.

21. An RF transponder device comprising a circuit arrangement that includes;

a flip-flop including at least one control input and a first control state output and a second control state output that is inverted with respect to the first control state output;

an energy storage arrangement including a capacitor configured to receive at least indirectly a signal from said first control state output;

a transistor switching stage connected to said energy storage arrangement; and

a logic gate interposed between said transistor switching stage and a signal output of said circuit arrangement, wherein the logic gate configured to receive a first signal corresponding to the first control state output and a second signal corresponding to the second control state output.

22. The RF transponder device according to claim 21, wherein said logic gate is a NAND gate, said flip-flop has a second control state output inverted relative to said first control state output, and said NAND gate has a first gate input connected to said second control state output and a second gate input connected to said transistor switching stage.

23. The RF Transponder device according to claim 21, wherein said transistor switching stage includes a first transistor and a second transistor connected with respective controlled conduction paths thereof in series between a supply voltage terminal and a reference voltage terminal, said first and second transistors have respective gates thereof connected to said energy storage arrangement, and a node between said controlled conduction paths of said first and second transistors is connected to said logic gate.

24. The device according to claim 21, wherein said energy storage arrangement further comprises a transistor having a controlled conduction path connected parallel to said capacitor between said control state output and a reference voltage terminal.