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Preventive recovery from adjacent track interference

  • US 7,747,907 B2
  • Filed: 09/20/2005
  • Issued: 06/29/2010
  • Est. Priority Date: 09/20/2005
  • Status: Expired due to Fees
First Claim
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1. A predictive failure control circuit apparatus that executes instructions stored on a computer readable medium to store ongoing observed numbers of executed host access commands individually for each of a plurality of different addressable storage locations of the medium, to compare each of the stored observed numbers to a predefined threshold quantity of executed host access commands, and in response to the comparison indicating that the stored observed number of executed host access commands at a first addressable storage location is greater than the predetermined threshold then to perform a data integrity operation on data stored at a second differently addressable storage location of the medium at a time when the stored observed number of executed host access commands at the second addressable storage location is less than the predetermined threshold quantity of executed host access commands.

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