×

Addressable hierarchical metal wire test methodology

  • US 7,749,778 B2
  • Filed: 01/03/2007
  • Issued: 07/06/2010
  • Est. Priority Date: 01/03/2007
  • Status: Expired due to Fees
0
Associated Cases
0
Associated Defendants
0
Product Citations
0
Petitions
14
Forward Citations
3
Assignments
First Claim
Patent Images

1. A method of monitoring and testing electro-migration and time dependent dielectric breakdown, comprising:

  • forming an addressable wiring test array, said addressable wiring test array comprising;

    a plurality or horizontally disposed metal wiring;

    a plurality of segmented, vertically disposed probing wiring disposed between adjacent metal wiring of said plurality of horizontally disposed metal wiring; and

    a plurality of metal stud connectors connecting said probing wiring,wherein said metal wiring and said probing wiring being formed of a first metal level and said connections being formed of a second metal level, andwherein each probing wiring comprises at least one pad;

    performing a single row continuity/resistance check to determine which row of said metal wiring is open, said single row continuity/resistance check comprising;

    sequentially feeding an amount of test current into an input node of each row of said metal wiring;

    determining which rows of said metal wiring have sufficient connectivity;

    recording which rows of said metal wiring have an open circuit; and

    connecting ends of said rows of said metal wiring having sufficient connectivity using jumper probe cables to form a serpentine shape;

    performing a full serpentine continuity/resistance check, said full serpentine continuity/resistance check comprising;

    testing all of said plurality of metal wiring at once to determine which row of said metal wiring is open;

    determining a position of short defects, said determining a position of short defects comprising;

    holding a first column of said probe wiring at a first voltage level;

    sequentially activating each row of said metal wiring using a second voltage level to determine if a short defect occurs;

    recording a location of the short defect; and

    repeating said holding, said sequentially activating and said recording for each of a plurality of columns of said probe wiring; and

    performing a hierarchical metal wiring test to zoom in on said location of said short defect, said hierarchical metal wiring test comprising;

    interconnecting a plurality of vertical serpentine interconnects and a plurality of horizontal serpentine interconnects;

    placing a plurality of probe pads at edges of said wiring test array to test for short defects between said plurality of vertical serpentine interconnects and said plurality of horizontal serpentine interconnects;

    determining which of a plurality of sub-arrays in said wiring test array contains a short defect; and

    recording which sub-array in said plurality of sub-arrays contains the short defect.

View all claims
  • 3 Assignments
Timeline View
Assignment View
    ×
    ×