Liquid crystal display device with common electrodes connected across gate signal lines utilizing bridge lines and connection portions

• US 7,751,013 B2
• Filed: 10/02/2007
• Issued: 07/06/2010
• Est. Priority Date: 04/09/2004
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Hitachi Displays Limited (Japan Display Incorporated)
• Inventors: Yasukawa, Shinji, Ono, Kikuo, Baba, Masashi, Oke, Ryutaro, Tanaka, Masahiro, Tsubokura, Masaki, Takenaka, Yuuichi, Ojima, Kazunori, Yamagishi, Yasuhiko
• Primary Examiner(s): Nelms; David
• Assistant Examiner(s): Merlin; Jessica M
• Application Number:
  US11/905,608
• Publication Number:
  US 20080043193A1
• Time in Patent Office: 1,008 Days
• Field of Search: 349/141, 349/144
• US Class Current: 349/141
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/52 RGB geometrical arrangements
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 2320/0673 for control of gamma adjustment, e.g. selecting another gamma curve
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

TFTs are formed on a substrate. An interlayer insulation film is formed on the substrate to cover the TFTs. Lower layer portions of SD lines formed of a multi-layered film which are formed on the interlayer insulation film constitute a lower electrode of an organic EL layer. An uppermost layer of the SD line is formed of a chemically stable metal oxide film, and the SD layer is used as it is. On the other hand, as a lower electrode of an organic EL layer, an upper layer of the SD line is removed and an Al—Si, alloy film of the SD line is used. Due to such a constitution, it is possible to reduce a cost by shortening steps while holding the performance and the reliability of organic EL.

Claims

1. A display device, comprising:

a plurality of pixel regions, each of which is defined by a region surrounded by a gate signal line and a video signal line;

a common electrode which is formed in each pixel region and has a rectangle shape, the common electrode being formed in the same layer with the gate signal line and formed by transparent material;

a pixel electrode which is overlapped to the common electrode and has a plurality of slits, the pixel electrode being formed by transparent material;

a common signal line which is formed in parallel with the gate signal line, and is connected with the common electrode; and

a bridge line which is adjoined and formed so as to be in parallel to the video signal line and intersect the gate signal line,

wherein the bridge line connects two common electrodes each located on each side of the gate signal line, the bridge line is formed in a different layer from said two common electrodes, the bridge line is arranged across the gate signal line and is connected with each of said two common electrodes through a through hole, the bridge line is formed one by one to every two or more pixel regions,

wherein a connection portion is arranged between the bridge line and the common electrode in the position of the through hole, the connection portion being formed by metal material, the connecting portion having a shape in which a corner portion thereof on the pixel electrode side is cut, and

wherein a direction of slits formed in an upper region of each pixel region is different from a direction of slits formed in a lower region of each pixel region,

each slit has an inclination which is not parallel to the gate signal line and the video signal line, and inclination of the slits in the upper region and the inclination of the slits in the lower region are symmetrically formed so as to converge to a center of each pixel region.

2. A display device according to claim 1, wherein the bridge line is formed along with the video signal line of a side toward which the plurality of slits converge.

3. A display device according to claim 2, wherein the common signal line is formed on a position of a connecting area where the bridge line connects the common electrode.

4. A display device according to claim 3, wherein the pixel electrode is not formed on the connecting area.

5. A display device according to claim 3, wherein the common electrode is not formed on the connecting area.

6. A display device according to claim 3, wherein a connecting layer is formed on the connecting area and connects electrically between the bridge line and the common electrode.

7. A display device according to claim 1, wherein the pixel electrode and the bridge line are formed on the same layer.

8. A display device according to claim 1, wherein the pixel electrode and the bridge line are formed of a same material.

9. A display device according to claim 8, wherein the common electrode and the bridge line are formed of the same material.

10. A display device according to claim 1, wherein the connection portion by the side of the common signal line consists of a part of the common signal line.