Communications signal transcoder

• US 7,751,477 B2
• Filed: 12/15/2003
• Issued: 07/06/2010
• Est. Priority Date: 02/13/2003
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Kwentus, Alan Y., Jaffe, Steven, Krafft, Stephen Edward, Brooks, Charles Alan
• Primary Examiner(s): Vo; Tung
• Assistant Examiner(s): HOLDER, ANNER N
• Application Number:
  US10/736,434
• Publication Number:
  US 20040161031A1
• Time in Patent Office: 2,395 Days
• Field of Search: 375/240.07, 375/262, 375/265, 375/269, 375/308, 375/279, 375/140, 725/144, 725/139, 725/127, 725/114, 348/608
• US Class Current: 375/240.07
• CPC Class Codes: H04N 21/2383 Channel coding or modulation of digital bit-stream, e.g. QPSK modulation arrangements for detecting or preventing errors in the information received by adapting the channel coding H04L1/0009; analogue front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002
• CPC Class Codes: H04N 21/4382 Demodulation or channel decoding, e.g. QPSK demodulation analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002

Abstract

Communications signal transcoder. A solution is provided to transcode a signal from a first signal type to a second signal type to ensure proper interfacing between devices that may operate using different signal types. For example, within a communication system, a first signal type (having a first modulation type, e.g., 8 PSK) may be received. The transcoder then ensures that this signal, after it has undergone any initial processing (such as tuning, down-converting, decoding, and so on), is encoded into a second signal type (having a second modulation type, e.g., QPSK) such that it can interface properly with a device for which the received signal is intended. This transcoder functionality may be implemented within discrete components, or it may alternatively be integrated within a functional block of an integrated circuit. This functionality may be implemented in a variety of communication systems including satellite, cable television, Internet, and others.

Claims

1. A transcoder, comprising:

an input that receives a first signal having a first signal type;

a transcoder functional block that transforms the first signal having the first signal type thereby generating a second signal having a second signal type, wherein the transcoder functional block includes;

a satellite receiver that is operative to decode the first signal having the first signal type, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

a modulator, connected to an output of the satellite receiver, that is operative to encode and modulate decoded output from the satellite receiver; and

a DAC (Digital to Analog Converter), connected to an output of the modulator, that is operative to transform the second signal having the second signal type from a digital signal into an analog signal;

an output that transmits the second signal having the second signal type;

a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, that is operative to direct operation of the transcoder functional block in transforming the first signal having the first signal type thereby generating the second signal having the second signal type;

wherein the first signal type includes a first modulation, a first code rate, a first symbol rate, and a first data rate; and

wherein the second signal type includes a second modulation, a second code rate, a second symbol rate, and a second data rate.

2. The transcoder of claim 1, wherein:

one of the plurality of decoding functionalities corresponds to a turbo code decoding functionality;

the first signal type is a turbo coded signal that includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 21.5 Msps (Mega-symbols per second), and a data rate of approximately 41 Mbps (Mega-bits per second); and

the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 7/8, a symbol rate of approximately 20 Msps, and a data rate of approximately 32.25 Mbps.

3. The transcoder of claim 1, wherein:

one of the plurality of decoding functionalities corresponds to an LDPC (Low Density Parity Check) code decoding functionality;

the first signal type is an LDPC coded signal that includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 20 Msps (Mega-symbols per second), and a data rate of approximately 40 Mbps (Mega-bits per second); and

the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 6/7, a symbol rate of approximately 20 Msps, and a data rate of approximately 30.5 Mbps.

4. The transcoder of claim 1, wherein:

the transcoder functional block is implemented within an integrated circuit.

5. The transcoder of claim 4, wherein:

the transcoder functional block includes a first functional block and a second functional block; and

the first functional block and the second functional block are functional blocks within the integrated circuit.

6. The transcoder of claim 4, wherein:

the first functional block is the satellite receiver that is operative to decode the first signal having the first signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

7. The transcoder of claim 4, wherein:

the first functional block includes a transport processor that includes a PID (Program Identification) filtering functional block, a PCR (Program Clock Reference) time stamp correction functional block, and a null packet insertion functional block;

the PID filtering functional block is operative to throw away data in the first signal having the first signal type;

the PCR time stamp correction functional block is operative to keep a time base of the first signal having the first signal type constant;

the null packet insertion functional block is operative to insert null packets into the second signal having the second signal type thereby ensuring a constant data rate of the second signal having the second signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

8. The transcoder of claim 7, wherein:

the transport processor is an MPEG-2 (Motion Picture Expert Group, level

     2) transport processor.

9. The transcoder of claim 1, wherein:

the transcoder is implemented as at least one of a one to many transcoder, a uni-directional transcoder, and a bi-directional transcoder;

the one to many transcoder is operative to transform the first signal having the first signal type thereby generating the second signal having the second signal type and a third signal having the third signal type;

the uni-directional transcoder is operative to transform the first signal having the first signal type thereby generating the second signal having the second signal type when communicating in a first direction with respect to the transcoder;

the bi-directional transcoder is operative to transform the first signal having the first signal type thereby generating the second signal having the second signal type when information is communicated in a first direction with respect to the transcoder; and

the bi-directional transcoder is also operative to transform a fourth signal having a fourth signal type thereby generating a fifth signal having a fifth signal type when information is communicated in a second direction with respect to the transcoder.

10. The transcoder of claim 1, wherein:

the transcoder is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cable television system, and a cable modem communication system.

11. The transcoder of claim 1, wherein:

the transcoder functional block includes a DVB (Digital Video Broadcasting) encoder/modulator that ensures that the second signal having the second signal type is a DVB STB (Set Top Box) compatible signal.

12. The transcoder of claim 1, wherein:

the transcoder functional block includes a first functional block and a second functional block;

a satellite signal, being a turbo coded signal and having an 8 PSK (Phase Shift Keying) modulation type, that is provided to a CMOS (Complementary Metal Oxide Semiconductor) satellite tuner that is operative to perform tuning and down-converting of the satellite signal to generate an analog baseband signal having I, Q (In-phase, Quadrature) components;

the first functional block is an 8 PSK (Phase Shift Keying) turbo code receiver;

the analog baseband signal is provided to the 8 PSK turbo code receiver that is operative to decode the analog baseband signal thereby generating a decoded baseband signal;

the analog baseband signal is the first signal having the first signal type that is provided to the transcoder functional block;

the transcoder functional block includes a DVB (Digital Video Broadcasting) encoder/modulator that is operative to transform the first signal having the first signal type thereby generating the second signal having the second signal type;

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into an analog IF (Intermediate Frequency) signal;

an up-converter functional block that is operative to up-convert the analog IF signal to an L-band signal having a frequency in a range of 950 MHz to 2150 MHz; and

the L-band signal is a DVB STB (Set Top Box) compatible signal.

13. The transcoder of claim 12, wherein:

the microcontroller or the state machine is operative to coordinate the communication and control of a Set Top Box (STB), to which the transcoder is communicatively coupled, and an LNB (Low Noise Block Converter) of a satellite dish to which the transcoder is also communicatively coupled.

14. The transcoder of claim 13, further comprising:

a first transceiver that interfaces the microcontroller or a state machine to the LNB; and

a second transceiver that interfaces the microcontroller or a state machine to the STB.

15. The transcoder of claim 14, wherein:

each of the first transceiver and the second transceiver is a DiSEqC (Digital Satellite Equipment Control) transceiver.

16. A transcoder, comprising:

an input that receives a first signal;

wherein the first signal includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 21.5 Msps (Mega-symbols per second), and a data rate of approximately 41 Mbps (Mega-bits per second);

a transcoder functional block that transforms the first signal thereby generating a second signal, wherein the transcoder functional block includes;

a satellite receiver that is operative to decode the first signal, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

a modulator, connected to an output of the satellite receiver, that is operative to encode and modulate decoded output from the satellite receiver; and

a DAC (Digital to Analog Converter), connected to an output of the modulator, that is operative to transform the second signal from a digital signal into an analog signal;

an output that transmits the second signal;

a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, that is operative to direct operation of the transcoder functional block in transforming the first signal having the first signal type thereby generating the second signal having the second signal type; and

wherein the second signal includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 7/8, a symbol rate of approximately 20 Msps, and a data rate of approximately 32.25 Mbps.

17. The transcoder of claim 16, wherein:

the transcoder functional block includes a DVB (Digital Video Broadcasting) encoder/modulator that ensures that the second signal having the second signal type is a DVB STB (Set Top Box) compatible signal.

18. The transcoder of claim 16, wherein:

the transcoder functional block includes a first functional block and a second functional block;

the first functional block includes a CMOS (Complementary Metal Oxide Semiconductor) satellite tuner;

the transcoder functional block includes an 8 PSK (8 Phase Shift Key) turbo code receiver and a DVB (Digital Video Broadcasting) encoder/modulator;

the second functional block includes the DAC;

a satellite signal, being a turbo coded signal and having an 8 PSK modulation type, is provided to the CMOS satellite tuner that is operative to perform tuning and down-converting of the satellite signal to generate an analog baseband signal having I, Q (In-phase, Quadrature) components;

the analog baseband signal is the first signal;

the analog baseband signal is provided from the CMOS satellite tuner to the 8 PSK turbo code receiver that is operative to decode the analog baseband signal thereby generating a decoded baseband signal;

the DVB encoder/modulator receives the decoded baseband signal and generates a digital DVB signal;

the digital DVB signal is the second signal;

the DAC (Digital to Analog Converter) is operative to transform the second signal from the digital signal into an analog IF (Intermediate Frequency) signal;

an up-converter functional block that is operative to up-convert the analog IF signal to an L-band signal having a frequency in a range of 950 MHz to 2150 MHz; and

the L-band signal is a DVB STB (Set Top Box) compatible signal.

19. The transcoder of claim 18, wherein:

the microcontroller or the state machine is operative to coordinate the communication and control of a STB (Set Top Box), to which the transcoder is communicatively coupled, and an LNB (Low Noise Block Converter) of a satellite dish to which the transcoder is also communicatively coupled.

20. The transcoder of claim 19, further comprising:

a first transceiver that interfaces the microcontroller or a state machine to the LNB; and

a second transceiver that interfaces the microcontroller or a state machine to the STB.

21. The transcoder of claim 20, wherein:

each of the first transceiver and the second transceiver is a DiSEqC (Digital Satellite Equipment Control) transceiver.

22. The transcoder of claim 16, wherein:

the first signal is a turbo coded signal.

23. A transcoder, comprising:

an input that receives a first signal;

wherein the first signal includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 20 Msps (Mega-symbols per second), and a data rate of approximately 40 Mbps (Mega-bits per second);

a transcoder functional block that transforms the first signal thereby generating a second signal, wherein the transcoder functional block includes;

a satellite receiver that is operative to decode the first signal, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

a modulator, connected to an output of the satellite receiver, that is operative to encode and modulate decoded output from the satellite receiver; and

a DAC (Digital to Analog Converter), connected to an output of the modulator, that is operative to transform the second signal from a digital signal into an analog signal;

an output that transmits the second signal;

a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, that is operative to direct operation of the transcoder functional block in transforming the first signal having the first signal type thereby generating the second signal having the second signal type; and

wherein the second signal includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 6/7, a symbol rate of approximately 20 Msps, and a data rate of approximately 30.5 Mbps.

24. The transcoder of claim 23, wherein:

the transcoder functional block includes a DVB (Digital Video Broadcasting) encoder/modulator that ensures that the second signal having the second signal type is a DVB STB (Set Top Box) compatible signal.

25. The transcoder of claim 23, wherein:

the transcoder functional block includes a first functional block and a second functional block;

the first functional block includes a CMOS (Complementary Metal Oxide Semiconductor) satellite tuner;

the transcoder functional block includes an 8 PSK (8 Phase Shift Key) LDPC (Low Density Parity Check) code receiver and a DVB (Digital Video Broadcasting) encoder/modulator;

the second functional block includes the DAC;

a satellite signal, being an LDPC coded signal and having an 8 PSK modulation type, is provided to the CMOS satellite tuner that is operative to perform tuning and down-converting of the satellite signal to generate an analog baseband signal having I, Q (In-phase, Quadrature) components;

the analog baseband signal is the first signal;

the analog baseband signal is provided from the CMOS satellite tuner to the 8 PSK LDPC code receiver that is operative to decode the analog baseband signal thereby generating a decoded baseband signal;

the DVB encoder/modulator receives the decoded baseband signal and generates a digital DVB signal;

the digital DVB signal is the second signal;

the DAC (Digital to Analog Converter) is operative to transform the second signal from a digital signal into an analog IF (Intermediate Frequency) signal;

an up-converter functional block that is operative to up-convert the analog IF signal to an L-band signal having a frequency in a range of 950 MHz to 2150 MHz; and

the L-band signal is a DVB STB (Set Top Box) compatible signal.

26. The transcoder of claim 25, wherein:

the microcontroller or the state machined is operative to coordinate the communication and control of a STB (Set Top Box), to which the transcoder is communicatively coupled, and an LNB (Low Noise Block Converter) of a satellite dish to which the transcoder is also communicatively coupled.

27. The transcoder of claim 26, further comprising:

a first transceiver that interfaces the microcontroller or a state machine to the LNB; and

a second transceiver that interfaces the microcontroller or a state machine to the STB.

28. The transcoder of claim 27, wherein:

each of the first transceiver and the second transceiver is a DiSEqC (Digital Satellite Equipment Control) transceiver.

29. The transcoder of claim 23, wherein:

the first signal is an LDPC coded signal.

30. A transcoding processing method, the method comprising:

receiving a first signal having a first signal type;

operating a transcoder functional block for transcoding the first signal having the first signal type thereby generating a second signal having a second signal type, wherein the transcoding including;

employing a satellite receiver within the transcoder functional block to decode the first signal having the first signal type, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

employing a modulator, within the transcoder functional block and connected to an output of the satellite receiver, to encode and modulate decoded output from the satellite receiver; and

employing a DAC (Digital to Analog Converter), connected to an output of the modulator, to transform the second signal having the second signal type from a digital signal into an analog signal;

outputting the second signal having the second signal type;

employing a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, for directing operation of the transcoder functional block in transcoding the first signal having the first signal type thereby generating the second signal having the second signal type; and

wherein the first signal type includes a first modulation, a first code rate, a first symbol rate, and a first data rate; and

wherein the second signal type includes a second modulation, a second code rate, a second symbol rate, and a second data rate.

31. The method of claim 30, wherein:

the first signal type includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 21.5 Msps (Mega-symbols per second), and a data rate of approximately 41 Mbps (Mega-bits per second); and

the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 7/8, a symbol rate of approximately 20 Msps, and a data rate of approximately 32.25 Mbps.

32. The method of claim 31, wherein:

the first signal is a turbo coded signal.

33. The method of claim 30, wherein:

the first signal type is an LDPC (Low Density Parity Check) coded signal that includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 20 Msps (Mega-symbols per second), and a data rate of approximately 40 Mbps (Mega-bits per second); and

the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 6/7, a symbol rate of approximately 20 Msps, and a data rate of approximately 30.5 Mbps.

34. The method of claim 33, wherein:

the first signal is a turbo coded signal.

35. The method of claim 30, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes the satellite receiver employed to decode the first signal having the first signal type; and

the second functional block includes the modulator and the DAC employed to transform the second signal having the second signal type from the digital signal into the analog signal.

36. The method of claim 30, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes a transport processor that includes a PID (Program Identification) filtering functional block, a PCR (Program Clock Reference) time stamp correction functional block, and a null packet insertion functional block;

the PID filtering functional block is operative to throw away data in the first signal having the first signal type;

the PCR time stamp correction functional block is operative to keep a time base of the first signal having the first signal type constant;

the null packet insertion functional block is operative to insert null packets into the second signal having the second signal type thereby ensuring a constant data rate of the second signal having the second signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

37. The method of claim 36, wherein:

the transport processor is an MPEG-2 (Motion Picture Expert Group, level

     2) transport processor.

38. A transcoding processing method, the method comprising:

receiving a first signal having a first signal type;

wherein the first signal type includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 21.5 Msps (Mega-symbols per second), and a data rate of approximately 41 Mbps (Mega-bits per second)

operating a transcoder functional block for transcoding the first signal having the first signal type thereby generating a second signal having a second signal type, wherein the transcoding including;

employing a satellite receiver within the transcoder functional block to decode the first signal having the first signal type, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

employing a modulator, within the transcoder functional block and connected to an output of the satellite receiver, to encode and modulate decoded output from the satellite receiver; and

employing a DAC (Digital to Analog Converter), connected to an output of the modulator, to transform the second signal having the second signal type from a digital signal into an analog signal;

wherein the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 7/8, a symbol rate of approximately 20 Msps, and a data rate of approximately 32.25 Mbps;

outputting the second signal having the second signal type;

employing a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, for directing operation of the transcoder functional block in transcoding the first signal having the first signal type thereby generating the second signal having the second signal type; and

wherein the first signal is a turbo coded signal.

39. The method of claim 38, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes the satellite receiver employed to decode the first signal having the first signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

40. The method of claim 38, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes a transport processor that includes a PID (Program Identification) filtering functional block, a PCR (Program Clock Reference) time stamp correction functional block, and a null packet insertion functional block;

the PID filtering functional block is operative to throw away data in the first signal having the first signal type;

the PCR time stamp correction functional block is operative to keep a time base of the first signal having the first signal type constant;

the null packet insertion functional block is operative to insert null packets into the second signal having the second signal type thereby ensuring a constant data rate of the second signal having the second signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

41. The method of claim 40, wherein the transport processor is an MPEG-2 (Motion Picture Expert Group, level 2) transport processor.

42. A transcoding processing method, the method comprising:

receiving a first signal having a first signal type;

wherein the first signal type includes an 8 PSK (Phase Shift Keying) modulation type, a code rate of 2/3, a symbol rate of approximately 20 Msps (Mega-symbols per second), and a data rate of approximately 40 Mbps (Mega-bits per second)

operating a transcoder functional block for transcoding the first signal having the first signal type thereby generating a second signal having a second signal type, wherein the transcoding including;

employing a satellite receiver within the transcoder functional block to decode the first signal having the first signal type, wherein the first signal including information encoded by a selected code of a plurality of codes, the satellite receiver including a plurality of decoding functionalities for respectively decoding in accordance with each of the plurality of code types, and the satellite receiver employing a selected decoding functionality of the plurality of decoding functionalities that corresponds to the selected code of the plurality of codes for decoding the first signal;

employing a modulator, within the transcoder functional block and connected to an output of the satellite receiver, to encode and modulate decoded output from the satellite receiver; and

employing a DAC (Digital to Analog Converter), connected to an output of the modulator, to transform the second signal having the second signal type from a digital signal into an analog signal;

wherein the second signal type includes a QPSK (Quadrature Phase Shift Keying) modulation type, a code rate of 6/7, a symbol rate of approximately 20 Msps, and a data rate of approximately 30.5 Mbps;

outputting the second signal having the second signal type;

employing a microcontroller or a state machine, external to and connected to each of the satellite receiver and the modulator, for directing operation of the transcoder functional block in transcoding the first signal having the first signal type thereby generating the second signal having the second signal type; and

wherein the first signal is an LDPC (Low Density Parity Check) coded signal.

43. The method of claim 42, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes a satellite receiver that is operative to decode the first signal having the first signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog.

44. The method of claim 42, wherein:

the method is performed using a first functional block and a second functional block;

the first functional block includes a transport processor that includes a PID (Program Identification) filtering functional block, a PCR (Program Clock Reference) time stamp correction functional block, and a null packet insertion functional block;

the PID filtering functional block is operative to throw away data in the first signal having the first signal type;

the PCR time stamp correction functional block is operative to keep a time base of the first signal having the first signal type constant;

the null packet insertion functional block is operative to insert null packets into the second signal having the second signal type thereby ensuring a constant data rate of the second signal having the second signal type; and

the second functional block includes the modulator and the DAC that is operative to transform the second signal having the second signal type from the digital signal into the analog signal.

45. The method of claim 44, wherein the transport processor is an MPEG-2 (Motion Picture Expert Group, level 2) transport processor.