Test apparatus, probe card, and test method

• US 7,755,375 B2
• Filed: 01/08/2008
• Issued: 07/13/2010
• Est. Priority Date: 01/08/2008
• Status: Active Grant

• Current Assignee: Advantest Corporation
• Original Assignee: Advantest Corporation
• Inventors: Komagata, Shigemi, Ariyama, Yuji
• Primary Examiner(s): Nguyen; Vinh P
• Application Number:
  US11/971,207
• Publication Number:
  US 20090174420A1
• Time in Patent Office: 917 Days
• Field of Search: 324754-765, 714/700
• US Class Current: 324/754.08
• CPC Class Codes: G01R 31/31928 Formatter driver, receiver details G01R31/31924

Abstract

There is provided a test apparatus for testing a device under test. The test apparatus includes a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals, and a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers. Here, each of the plurality of probe pins has a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, and the top end portion of each probe pin is kept electrically open while the test apparatus is not testing the device under test.

Claims

1. A test apparatus for testing a device under test, comprising

a plurality of drivers that respectively output a plurality of test signals;

a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of probe pins having a connection portion that is capable of receiving a signal output from a corresponding one of the drivers and a top end portion that is capable of being either electrically connected to a terminal of the device under test or electrically open; and

a processing section that causes the plurality of drivers to respectively output a plurality of adjustment signals, measures reflected waves of the plurality of adjustment signals from the top end portions of the plurality of probe pins when the top end portions are electrically open, and adjusts timings at which the plurality of drivers output the plurality of test signals with reference to a result of the measurement of the reflected waves, wherein

the top end portions of two or more of the plurality of probe pins are capable of being electrically connected to the same terminal of the device under test, and

when the top end portions of the two or more of the plurality of probe pins are electrically connected to the same terminal, the plurality of drivers respectively output the plurality of test signals at the adjusted timings such that the plurality of test signals through the two or more of the plurality of probe pins are combined into a multiple-valued signal at the same terminal.

2. The test apparatus as set forth in claim 1, further comprising

a plurality of transmission paths that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of transmission paths transmitting therethrough a signal output from a corresponding one of the plurality of drivers to a corresponding one of the plurality of probe pins, wherein

the connection of each of the plurality of probe pins is connected to a corresponding one of the plurality of transmission paths, and

the plurality of probe pins are formed in such a manner that the top end portions are arranged at a smaller interval than the connection portions.

3. The test apparatus as set forth in claim 2, further comprising

a probe card that has the plurality of transmission paths and the plurality of probe pins fixed therein, wherein

the plurality of transmission paths are formed on the probe card, and

the plurality of probe pins are formed in such a manner that the connection portions are fixed on the probe card and the top end portions protrude from a surface of the probe card.

4. The test apparatus as set forth in claim 1, wherein

the top end portions of the two or more of the plurality of probe pins are arranged at an interval that is smaller than a width of the same terminal.

5. The test apparatus as set forth in claim 1, further comprising

a plurality of comparators that are provided in a one-to-one correspondence with the plurality of drivers, each of the plurality of comparators having an input end electrically connected to an output end of a corresponding one of the plurality of drivers, each comparator measuring a signal input thereto, wherein

the processing section comprises a synchronization adjusting section that causes the plurality of drivers to respectively output a plurality of adjustment signals, causes the plurality of comparators to measure reflected waves of the plurality of adjustment signals from the top end portions of the plurality of probe pins when the top end portions are electrically open, and adjusts timings at which the plurality of drivers output the plurality of test signals with reference to a result of the measurement of the reflected waves.

6. The test apparatus as set forth in claim 5, wherein

the synchronization adjusting section adjusts the timing at which each of the plurality of drivers outputs the test signal with reference to (i) a timing at which a corresponding one of the plurality of comparators detects the adjustment signal output from the driver and (ii) a timing at which the corresponding comparator detects the adjustment signal which is reflected at the top end portion of a corresponding one of the plurality of probe pins.