VSB reception system with enhanced signal detection for processing supplemental data

• US 7,755,704 B2
• Filed: 12/04/2009
• Issued: 07/13/2010
• Est. Priority Date: 01/19/2001
• Status: Active Grant

• Current Assignee: LG Electronics, Inc. (LG Corporation)
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Choi, In Hwan, Gu, Young Mo, Kwak, Kook Yeon, Kang, Kyung Won
• Primary Examiner(s): HSIA, SHERRIE Y
• Application Number:
  US12/631,736
• Publication Number:
  US 20100073571A1
• Time in Patent Office: 221 Days
• Field of Search: 348/614, 348/21, 348/607, 348/554, 348/553, 348/608, 348723-726, 348/611, 348/612, 375/277, 375/262, 375/264, 375/265, 375/341, 375/295, 375/240.01, 375/240.12, 375/240.26, 375/286, 375/321
• US Class Current: 348/614
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2936 comprising an outer Reed-Solomon code and an inner convolutional code
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0047 Decoding adapted to other signal detection operation in conjunction with sequence estimation or equalization H04L25/03286
• CPC Class Codes: H04L 1/0054 Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/0065 Serial concatenated codes
• CPC Class Codes: H04L 1/007 Unequal error protection for format H04L1/0078; for codes per se H03M13/35
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 2025/03382 Single of vestigal sideband
• CPC Class Codes: H04L 25/03057 with a recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/061 providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset removal of dc offset in coupling arrangements H04L25/029, H04L25/0296
• CPC Class Codes: H04L 25/062 Setting decision thresholds using feedforward techniques only
• CPC Class Codes: H04L 27/04 Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/06 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04N 21/235 Processing of additional data, e.g. scrambling of additional data or processing content descriptors
• CPC Class Codes: H04N 21/2383 Channel coding or modulation of digital bit-stream, e.g. QPSK modulation arrangements for detecting or preventing errors in the information received by adapting the channel coding H04L1/0009; analogue front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002
• CPC Class Codes: H04N 21/426 Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 21/435 : Processing of additional data, e.g. decrypting of additional data, reconstructing software from modules extracted from the transport stream
• CPC Class Codes: H04N 21/4382 : Demodulation or channel decoding, e.g. QPSK demodulation analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002
• CPC Class Codes: H04N 5/211 : Ghost signal cancellation H04N23/81 takes precedence
• CPC Class Codes: H04N 7/52 : Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal assembling of a multiplex stream by combining a video stream with other content or additional data, remultiplexing of multiplex streams, insertion of stuffing bits into the multiplex stream, assembling of a packetised elementary stream at server side H04N21/236; disassembling of a multiplex stream, remultiplexing of multiplex streams, extraction or processing of Service Information, disassembling of packetised elementary stream at client side H04N21/434

Abstract

A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.

Claims

1. A method of processing data in a transmission system, the method comprising:

performing first encoding on first data in a first encoder, the first data being input to the first encoder through a first path;

interleaving the encoded first data in a first interleaver for first burst error correction;

multiplexing the interleaved first data with second data in a multiplexer, the second data being input to the multiplexer through a second path different from the first path;

performing second encoding on the multiplexed first and second data in a second encoder, the second encoding being different from the first encoding;

interleaving the first and second data encoded by the second encoder in a second interleaver for second burst error correction; and

adding sync information to the first and second data interleaved in the second interleaver.

2. A transmission system for processing data, the transmission system comprising:

a first encoder performing first encoding on first data, the first data being input to the first encoder through a first path;

a first interleaver interleaving the encoded first data for first burst error correction;

a multiplexer multiplexing the interleaved first data with second data, the second data being input to the multiplexer through a second path different from the first path;

a second encoder performing second encoding on the multiplexed first and second data, the second encoding being different from the first encoding;

a second interleaver interleaving the second encoded first and second data for second burst error correction; and

an inserter for inserting sync information to the first and second data interleaved in the second interleaver.

3. A method of processing data in a reception system, the method comprising:

detecting sync information from a signal in a sync detector, the signal including first data multiplexed with second data, the first and second data including at least audio or video data;

deinterleaving the first and second data in a first deinterleaver for first burst error correction;

performing first decoding on the deinterleaved first and second data in a first decoder;

demultiplexing the decoded first data from the decoded second data in a demultiplexer, the decoded first data being output from the demultiplexer through a first path and the decoded second data being output from the demultiplexer through a second path different from the first path;

deinterleaving the demultiplexed first data in a second deinterleaver for second burst error correction; and

performing second decoding in a second decoder on the first data deinterleaved for second burst error correction.

4. A reception system for processing data, the reception system comprising:

a sync detector detecting sync information from a signal including first data multiplexed with second data, the first and second data including at least audio or video data;

a first deinterleaver for deinterleaving the first and second data for first bust error correction;

a first decoder for performing first decoding on the deinterleaved first and second data;

a demultiplexer for demultiplexing the decoded first data from the decoded second data, the decoded first data being output from the demultiplexer through a first path and the decoded second data being output from the demultiplexer through a second path different from the first path;

a second deinterleaver for deinterleaving the demultiplexed first data for second burst error correction; and

a second decoder for performing second decoding on the first data deinterelaved for second burst error correction.