RF power amplifier

• US 7,756,494 B2
• Filed: 06/18/2007
• Issued: 07/13/2010
• Est. Priority Date: 06/19/2006
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Tanaka, Satoshi, Ohnishi, Masami, Fujioka, Toru, Shimizu, Toshihiko, Matsumoto, Hidetoshi
• Primary Examiner(s): Anderson; Matthew D
• Assistant Examiner(s): Bilodeau; David
• Application Number:
  US11/764,511
• Publication Number:
  US 20070298736A1
• Time in Patent Office: 1,121 Days
• Field of Search: 455/78, 4551271-1274, 330/296
• US Class Current: 455/127.1
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/181 A coil being added in the gate circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/432 Two or more amplifiers of different type are coupled in parallel at the input or output, e.g. a class D and a linear amplifier, a class B and a class A amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/456 A scaled replica of a transistor being present in an amplifier
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03G 3/004 Control by varying the supply voltage
• CPC Class Codes: H04B 2001/045 with means for improving efficiency

Abstract

The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

Claims

1. An RF power amplifier comprising:

a first amplification device;

a second amplification device; and

a third amplification device,

wherein the first to third amplification devices are formed on a common semiconductor chip as final-stage amplification power devices connected in parallel between an input terminal and an output terminal,

an input electrode of the third amplification device is connected with an input electrode of the first amplification device through a switching device,

when an RF power output is at Low level, the switching device is controlled to be in OFF state, whereby the third amplification device is controlled to be in OFF state,

when the RF power output is at Low level, a first bias voltage of an input terminal of the first amplification device is set to be higher than a second bias voltage of an input terminal of the second amplification device so that the first amplification device is operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

), and the second amplification device is operational in Class C with a conduction angle below π

(180°

), and

when the RF power output is at High level, the switching device is controlled to be in ON state,

when the RF power output is at High level, (1) a first bias voltage of an input terminal of the first amplification device and an input terminal of the third amplification device, and (2) the second bias voltage of the input terminal of the second amplification device are set so that the first and third amplification devices are operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

), and the second amplification device is also operational in any one of operating classes between Class B with a conduction angle of π

(180°

) and Class AB with a conduction angle of π

(180°

) to 2π

(360°

),

a first effective device size of the first amplification device and a third effective device size of the third amplification device are set to be substantially identical to each other, but intentionally smaller than a second effective device size of the second amplification device beyond a range of a manufacturing error of the semiconductor chip.

2. The RF power amplifier of claim 1, further comprising:

RF drive-and-amplification stages for driving the final-stage amplification power devices; and

a power supply circuit which is supplied with an external source voltage, and which supplies a first source voltage controlled in response to a level of a transmission level-specifying signal to the first and third amplification devices, and supplies a controlled second source voltage to the second amplification device.

3. The RF power amplifier of claim 2, wherein the first source voltage is supplied to an output electrode of the first amplification device and an output electrode of the third amplification device through a first load device,

the second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

the power supply circuit works so that a level of the first source voltage reduces in response to reduction in level of an output power of the RF power amplifier.

4. The RF power amplifier of claim 2, wherein the first source voltage is supplied to an output electrode of the first amplification device and an output electrode of the third amplification device through a first load device,

the second source voltage is supplied to an output electrode of the second amplification device through a second load device, and

the power supply circuit works so that a level of the second source voltage rises in response to rise of an output power of the RF power amplifier.

5. The RF power amplifier of claim 2, wherein the power supply circuit includes a DC-DC converter composed of a switching regulator.

6. The RF power amplifier of claim 3, further comprising:

a power detector for detecting a level in connection with the output power from the output terminal;

an error amplifier for producing an automatic power control signal when being supplied with the transmission level-specifying signal and a power detection signal of the power detector;

driving input bias circuits for controlling the level of driving input bias voltages of the RF drive-and-amplification stages in response to the automatic power control signal produced by the error amplifier; and

final-stage input bias circuits for controlling the levels of final-stage input bias voltages of the first to third amplification devices as the final-stage amplification power devices in response to the automatic power control signal produced by the error amplifier.

7. The RF power amplifier of claim 1, wherein the switching device is a MEMS switch formed on the semiconductor chip.

8. The RF power amplifier of claim 1, wherein first to third amplification devices are each a field effect transistor.

9. The RF power amplifier of claim 8, wherein the field effect transistor is an LDMOS.

10. The RF power amplifier of claim 1, wherein the first to third amplification devices are each a bipolar transistor.

11. The RF power amplifier of claim 10, wherein the bipolar transistor is of a heterojunction type.

12. The RF power amplifier of claim 1, wherein the first effective device size of the first amplification device and the third effective device size of the third amplification device are set to be substantially half of the second effective device size of the second amplification device.

13. The RF power amplifier of claim 6, wherein the semiconductor chip with the first to third amplification devices formed thereon, the power detector and the error amplifier, and the DC-DC converter are incorporated in an RF power module package.