Anti-reflection structures for CMOS image sensors

• US 7,759,755 B2
• Filed: 05/14/2008
• Issued: 07/20/2010
• Est. Priority Date: 05/14/2008
• Status: Active Grant

• Current Assignee: Smartsens Technology (Cayman) Co., Ltd.
• Original Assignee: International Business Machines Corporation
• Inventors: Gambino, Jeffrey P., Ellis-Monaghan, John J., Adkisson, James W., Musante, Charles F.
• Primary Examiner(s): Mandala; Victor A
• Application Number:
  US12/120,413
• Publication Number:
  US 20090283807A1
• Time in Patent Office: 797 Days
• Field of Search: 257/59, 257/72, 257/222, 257/229, 257/258, 257/292, 257/436, 257/E31.079, 257/E31.123
• US Class Current: 257/436
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05 of an individual bonding area
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48464 the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
• CPC Class Codes: H01L 2224/4847 the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14629 Reflectors
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/12043 : Photo diode
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15312 : being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 31/02165 : using interference filters, e.g. multilayer dielectric filters interference filters G02B5/28
• CPC Class Codes: H01L 31/0236 : Special surface textures
• CPC Class Codes: H01L 31/103 : the potential barrier being of the PN homojunction type
• CPC Class Codes: Y02E 10/50 : Photovoltaic [PV] energy

Abstract

Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.

Claims

1. A semiconductor structure comprising:

a photodiode located on a first surface of a semiconductor layer;

a metal interconnect layer located on said first surface of said semiconductor layer; and

an insulator layer located on a second surface of said semiconductor layer, wherein said second surface is located on an opposite side of said first surface, and wherein said insulator layer includes an array of protuberances at an interface with an ambient gas or vacuum, wherein a pitch of said protuberances is less than 270 nm.

2. The semiconductor structure of claim 1, wherein said pitch is a sub-lithographic dimension.

3. The semiconductor structure of claim 1, wherein said array is a regular hexagonal array.

4. The semiconductor structure of claim 1, further comprising:

a transistor located directly on said first surface of said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode; and

a shallow trench isolation region abutting said first surface of said semiconductor layer.

5. The semiconductor structure of claim 1, wherein each of said array of protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone, and wherein a height of said cone is from about 40 nm to about 480 nm.

6. The semiconductor structure of claim 1, wherein said semiconductor layer comprises silicon and said insulator layer comprise silicon oxide, and wherein a total height of said insulator layer including said array of protuberances is from about 100 nm to about 2,000 nm.

7. A semiconductor structure comprising:

a photodiode located on a first surface of a semiconductor layer;

a metal interconnect layer located on said first surface of said semiconductor layer; and

an insulator layer located on a second surface of said semiconductor layer, wherein said second surface is located on an opposite side of said first surface, said insulator layer includes an array of protuberances at an interface with an ambient gas or vacuum, and said array is a regular hexagonal array.

8. The semiconductor structure of claim 7, wherein a pitch of said protuberances is a sub-lithographic dimension.

9. The semiconductor structure of claim 7, further comprising:

a transistor located directly on said first surface of said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode; and

a shallow trench isolation region abutting said first surface of said semiconductor layer.

10. The semiconductor structure of claim 7, wherein each of said array of protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone, and wherein a height of said cone is from about 40 nm to about 480 nm.

11. The semiconductor structure of claim 7, wherein said semiconductor layer comprises silicon and said insulator layer comprise silicon oxide, and wherein a total height of said insulator layer including said array of protuberances is from about 100 nm to about 2,000 nm.

12. A semiconductor structure comprising:

a photodiode located on a first surface of a semiconductor layer;

a metal interconnect layer located on said first surface of said semiconductor layer; and

an insulator layer located on a second surface of said semiconductor layer, wherein said second surface is located on an opposite side of said first surface, said insulator layer includes an array of protuberances at an interface with an ambient gas or vacuum, and wherein each of said array of protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone, and said cone has a height from about 40 nm to about 480 nm.

13. The semiconductor structure of claim 12, wherein a pitch of said protuberances is a sub-lithographic dimension.

14. The semiconductor structure of claim 12, wherein said array is a regular hexagonal array.

15. The semiconductor structure of claim 12, further comprising:

a transistor located directly on said first surface of said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode; and

a shallow trench isolation region abutting said first surface of said semiconductor layer.

16. The semiconductor structure of claim 12, wherein said semiconductor layer comprises silicon and said insulator layer comprise silicon oxide, and wherein a total height of said insulator layer including said array of protuberances is from about 100 nm to about 2,000 nm.