Automatic gain control using multiple equalized estimates dynamic hysteresis

• US 7,760,816 B2
• Filed: 01/11/2007
• Issued: 07/20/2010
• Est. Priority Date: 01/11/2007
• Status: Expired due to Fees

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Rahman, Mahibur, Freytag, Lynn R., Sobchak, Charles Leroy
• Primary Examiner(s): Payne, David C
• Assistant Examiner(s): File, Erin M
• Application Number:
  US11/622,402
• Publication Number:
  US 20080170646A1
• Time in Patent Office: 1,286 Days
• Field of Search: 330/278, 330/295, 375/297, 375/345, 455/234.1, 455/253.2
• US Class Current: 375/297
• CPC Class Codes: H03G 3/3057 using at least one diode as controlling device
• CPC Class Codes: H04L 27/01 Equalisers baseband equalizers at the transmitter end H04L25/03343; in analogue transmission systems H04B3/04, H04B7/005

Abstract

At least one adjustable gain analog amplifier (120, 124 and 128) in an analog line-up (102) amplifies by a gain an analog signal at an input of the analog line-up (102). The at least one adjustable gain analog amplifier (120, 124 and 128) is operable at one or more gains. At least one digital estimation device (134, 140 and 146) receives signal via an output (108) of the analog line-up (10) and provides a digital signal estimate representative of an analog signal at an input of a respective one of the at least one adjustable gain analog amplifier (120, 124 and 128) in the analog line-up (102). An AGC controller (152) monitors the digital signal estimate. The AGC controller (152) adjusts the gain of the at least one analog amplifier (120, 124 and 128). An RF receiver and an integrated circuit utilizing the novel features are also disclosed.

Claims

1. A radio frequency (RF) receiver, comprising:

a plurality of analog filters in an RF front-end section of an RF receiver;

a plurality of adjustable-gain analog amplifiers in the RF front-end section for amplifying by a gain a signal received by the RF receiver, each adjustable-gain analog amplifier operable at one gain separately selected from a plurality of gains, the RF front-end section producing an analog signal at an analog output;

a digital-to-analog converter, coupled to the analog output, for converting the analog signal to a digital signal at a digital output; and

a digital automatic gain control (AGC) system, communicatively coupled with the plurality of adjustable-gain analog amplifiers, for controlling the one gain of each adjustable-gain analog amplifier, the digital AGC system including;

a plurality of digital equalizer filters, one of the digital equalizer filters communicatively coupled with the digital output of the RF front-end section, thereby monitoring a digital signal estimate of the analog signal at the analog output of the RF front-end section, each digital equalizer filter having an inverse magnitude response of a corresponding analog filter in the RF front-end section;

a plurality of digital estimation devices, each digital estimation device coupled to one of the digital equalizer filters, each digital estimation device providing a digital signal estimate representative of an analog signal at an input of a respective one of the adjustable-gain analog amplifiers in the RF front-end section; and

an AGC controller, communicatively coupled with each digital estimation device, for monitoring the digital signal estimate provided by each digital estimation device, thereby monitoring a level of the analog signal at the input of the respective one of the adjustable-gain analog amplifiers in the RF front-end section, the AGC controller having a control output communicatively coupled with a respective control input of each adjustable-gain analog amplifier for separately controlling the one gain of each respective adjustable-gain analog amplifier based, in part, on the digital signal estimate provided by each digital estimation device.

2. The RF receiver of claim 1, wherein the AGC controller compares a digital signal estimate from the plurality of one digital estimation device to one or more digital threshold values to determine a gain state to set for each adjustable-gain analog amplifier.

3. The RF receiver of claim 2, wherein the one or more digital threshold values correspond to one or more gain states of the at least one adjustable-gain analog amplifier.

4. The RF receiver of claim 3, wherein the one or more digital threshold values define one or more ranges of values that the AGC controller compares to the digital signal estimate to determine the gain state to set for the at least one adjustable-gain analog amplifier.

5. The RF receiver of claim 2, wherein the AGC controller compares a plurality of digital signal estimates from the plurality of digital estimation devices to one or more digital threshold values to determine the gain state to set for the plurality of adjustable-gain analog amplifiers.

6. The RF receiver of claim 1, wherein each digital equalizer filter has an inverse magnitude response for all frequencies present in the digital signal at the digital output.

7. The RF receiver of claim 1, including a gain state table, and wherein each digital equalizer filter has its own set of gains and increment/decrement steps, separate from the other digital equalizer filters, stored in the gain state table, for use by the digital AGC system.

8. The RF receiver of claim 1, including a dynamic hysteresis controller that uses a pre-defined set of hysteresis threshold values to provide, as an input to the AGC controller, digital hysteresis threshold values used for setting gain states for the plurality of adjustable-gain analog amplifiers in the RF front-end section.

9. The RF receiver of claim 8, wherein the one or more hysteresis threshold values are pre-defined according to at least one of the following relationships:

an upper hysteresis threshold value for a step is equal to (upper step size threshold minus a minimum step value) multiplied by a scaling factor plus a minimum hysteresis value; and

a lower hysteresis threshold value for the same step is equal to (lower step size threshold minus a minimum step value) multiplied by a scaling factor plus a minimum hysteresis value.

10. The RF receiver of claim 1, wherein the plurality of adjustable-gain analog amplifiers in the RF front-end section has steps of nonlinear sizes for the plurality of gains at which each adjustable-gain analog amplifier is operable, and wherein the digital AGC system includes a dynamic hysteresis controller that computes thresholds for the steps of nonlinear sizes.

11. The RF receiver of claim 1, wherein the plurality of gains at which each adjustable-gain analog amplifier is operable has steps of nonlinear sizes, and wherein a scaled version of the hysteresis at each threshold point is a function of minimum step size, as follows:

for each gain stage;

stepsizeU_n=g_n(m−

1)−

g_n(m)

stepsizeL_n=g_n(m)−

g_n(m+1)

upperhysteresis=(stepsizeU_n−

minstep_n)scale_n+minhysteresis_n

lowerhysteresis=(stepsizeL_n−

minstep_n)scale_n+minhysteresis_n,

where g_n is the gain of the n^th gain stage.

12. A method of automatic gain control for one or more cascaded adjustable-gain analog amplifiers, the method comprising:

providing one or more digitally equalized power estimates for one or more respective cascaded adjustable-gain analog amplifiers;

selecting a first digitally equalized power estimate from the one or more digitally equalized power estimates, the selected first digitally equalized power estimate being associated with a first adjustable-gain analog amplifier in the one or more cascaded adjustable-gain analog amplifiers;

determining whether to digitally adjust the selected first digitally equalized power estimate associated with the first adjustable-gain analog amplifier;

providing, responsive to the determining, a gain control signal to the first adjustable-gain analog amplifier corresponding to the selected first digitally equalized power estimate;

comparing the selected first digitally equalized power estimate to a first predefined digital threshold of power associated with the first adjustable-gain analog amplifier; and

determining in the affirmative to digitally adjust the selected first digitally equalized power estimate associated with the first adjustable-gain analog amplifier if the comparing indicates that the selected first digitally equalized power estimate is greater than the first predefined digital threshold of power.

13. The method of claim 12, wherein the selected first digitally equalized power estimate is determined greater than the first predefined digital threshold of power when one of:

the selected first digitally equalized power estimate is above the first predefined digital threshold of power; and

the selected first digitally equalized power estimate is below the first predefined digital threshold of power.

14. The method of claim 12, wherein the first adjustable-gain analog amplifier has one or more adjustment steps for adjusting the gain, and the method further comprising:

comparing the selected first digitally equalized power estimate to a first predefined digital threshold of power associated with the first adjustable-gain analog amplifier, wherein the first predefined digital threshold of power is set according to one or more hysteresis thresholds relative to the one or more adjustment steps; and

determining in the affirmative to digitally adjust the selected first digitally equalized power estimate associated with the first adjustable-gain analog amplifier if the comparing indicates that the selected first digitally equalized power estimate is greater than the first predefined digital threshold of power.

15. The method of claim 14, wherein the one or more hysteresis thresholds relative to the one or more adjustment steps are pre-defined according to at least one of the following relationships:

an upper hysteresis threshold for a step is equal to (upper step size threshold minus a minimum step value) multiplied by a scaling factor plus a minimum hysteresis value; and

a lower hysteresis threshold for the same step is equal to (lower step size threshold minus a minimum step value) multiplied by a scaling factor plus a minimum hysteresis value.

16. The method of claim 12, further comprising:

in response to the determining, digitally adjusting the selected first digitally equalized power estimate associated with the first adjustable-gain analog amplifier to bring the selected first digitally equalized power estimate within a predefined power range.

17. The method of claim 12, further comprising:

selecting a second digitally equalized power estimate from the one or more digitally equalized power estimates, the selected second digitally equalized power estimate being associated with a second adjustable-gain analog amplifier in the one or more cascaded adjustable-gain analog amplifiers, the second adjustable-gain analog amplifier being part of a subsequent stage in the one or more cascaded adjustable-gain analog amplifiers;

determining whether to digitally adjust the selected second digitally equalized power estimate associated with the second adjustable-gain analog amplifier, based at least in part on the selected first digitally equalized power estimate being associated with the first adjustable-gain analog amplifier; and

providing, responsive to the determining whether to digitally adjust the selected second digitally equalized power estimate, a gain control signal to the second adjustable-gain analog amplifier corresponding to the selected second digitally equalized power estimate.

18. The method of claim 12, further comprising

comparing the selected first digitally equalized power estimate to a first predefined digital threshold of power associated with the first adjustable-gain analog amplifier;

determining whether to digitally adjust the selected first digitally equalized power estimate associated with the first adjustable-gain analog amplifier if the comparing indicates that the selected first digitally equalized power estimate is outside of a pre-defined power range associated with the first predefined digital threshold of power;

selecting a second digitally equalized power estimate from the one or more digitally equalized power estimates, the selected second digitally equalized power estimate being associated with a second adjustable-gain analog amplifier in the one or more cascaded adjustable-gain analog amplifiers, the second adjustable-gain analog amplifier being part of a subsequent stage in the one or more cascaded adjustable-gain analog amplifiers;

comparing the selected second digitally equalized power estimate, as first adjusted by any digital adjustment of the selected first digitally equalized power estimate, to a second predefined digital threshold of power associated with the second adjustable-gain analog amplifier;

determining whether to digitally adjust the selected second digitally equalized power estimate associated with the second adjustable-gain analog amplifier if the comparing indicates that the selected second digitally equalized power estimate, as first adjusted by any digital adjustment of the selected first digitally equalized power estimate, is outside of a pre-defined power range associated with the second predefined digital threshold of power; and

providing, responsive to the determining whether to digitally adjust the selected second digitally equalized power estimate, a gain control signal to the second adjustable-gain analog amplifier corresponding to the selected second digitally equalized power estimate.

19. The method of claim 12, wherein the plurality of gains at which each adjustable-gain analog amplifier is operable has steps of nonlinear sizes, and wherein a scaled version of the hysteresis at each threshold point is a function of minimum step size, as follows:

for each gain stage;

stepsizeU_n=g_n(m−

1)−

g_n(m)

stepsizeL_n=g_n(m)−

g_n(m+1)

upperhysteresis=(stepsizeU_n−

minstep_n)scale_n+minhysteresis_n

lowerhysteresis=(stepsizeL_n−

minstep_n)scale_n+minhysteresis_n,

where g_n is the gain of the n^th gain stage.

20. An integrated circuit, comprising:

a circuit-supporting substrate; and

an electronic circuit disposed on the circuit-supporting substrate, the electronic circuit comprising;

a plurality of analog filters in an RF front-end section of an RF receiver;

a plurality of adjustable-gain analog amplifiers in the RF front-end section for amplifying by a gain a signal received by the RF receiver, each adjustable-gain analog amplifier operable at one gain separately selected from a plurality of gains, the RF front-end section producing an analog signal at an analog output;

a digital-to-analog converter, coupled to the analog output, for converting the analog signal to a digital signal at a digital output; and

a digital automatic gain control (AGC) system, communicatively coupled with the plurality of adjustable-gain analog amplifiers, for controlling the one gain of each adjustable-gain analog amplifier, the digital AGC system including;

a plurality of digital equalizer filters, one of the digital equalizer filters communicatively coupled with the digital output of the RF front-end section, thereby monitoring a digital signal estimate of the analog signal at the analog output of the RF front-end section, each digital equalizer filter having an inverse magnitude response of a corresponding analog filter in the RF front-end section;

a plurality of digital estimation devices, each digital estimation device coupled to one of the digital equalizer filters, each digital estimation device providing a digital signal estimate representative of an analog signal at an input of a respective one of the adjustable-gain analog amplifiers in the RF front-end section; and

an AGC controller, communicatively coupled with each digital estimation device, for monitoring the digital signal estimate provided by each digital estimation device, thereby monitoring a level of the analog signal at the input of the respective one of the adjustable-gain analog amplifiers in the RF front-end section, the AGC controller having a control output communicatively coupled with a respective control input of each adjustable-gain analog amplifier for separately controlling the one gain of each respective adjustable-gain analog amplifier.