System and method to extend synchronous operation of an active converter in a variable speed drive

• US 7,764,041 B2
• Filed: 10/31/2007
• Issued: 07/27/2010
• Est. Priority Date: 01/22/2007
• Status: Active Grant

• Current Assignee: Johnson Controls Tyco IP Holdings LLP (Johnson Controls International plc)
• Original Assignee: Johnson Controls Technology Company (Johnson Controls International plc)
• Inventors: Schnetzka, Harold R., Adiga Manoor, Shreesha
• Primary Examiner(s): Duda; Rina I
• Application Number:
  US11/932,280
• Publication Number:
  US 20080174258A1
• Time in Patent Office: 1,000 Days
• Field of Search: 318/628, 318/632, 318/638, 318/803, 318/805, 388/907.5, 388/911
• US Class Current: 318/632
• CPC Class Codes: F25B 2600/021 Inverters therefor
• CPC Class Codes: F25B 49/025 Motor control arrangements
• CPC Class Codes: H02M 1/12 Arrangements for reducing harmonics from ac input or output
• CPC Class Codes: H02M 1/123 Suppression of common mode voltage or current
• CPC Class Codes: H02P 2201/03 AC-DC converter stage controlled to provide a defined DC link voltage general aspects of plural converters in cascade H02M
• CPC Class Codes: H02P 27/08 with pulse width modulation
• CPC Class Codes: H02P 29/50 Reduction of harmonics
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/095 using a lock detector H03L7/087 takes precedence
• CPC Class Codes: H05K 7/20936 Liquid coolant with phase change
• CPC Class Codes: Y02B 30/70 Efficient control or regulation technologies, e.g. for control of refrigerant flow, motor or heating

Abstract

Systems and methods for synchronous operation of variable speed drives having active converters include extending the synchronous operation of an active converter to the AC mains voltage during complete line dropout. A phase angle control circuit includes a squaring amplifier, a first phase-lock loop circuit associated and a second phase-lock loop circuit. The squaring amplifier receives the AC power source and outputs a rectangular output signal to a pair of phase lock loop (PLL) circuits. The first PLL circuit with a first lag-lead filter is configured with a high cutoff frequency to provide the converter stage with a phase angle parameter; and the second phase-lock loop circuit including a second lag-lead filter configured to have a low cutoff frequency to provide the lag-lead filter the capability of storing the phase angle of the mains voltage during mains interruption.

Claims

1. A variable speed drive system configured to receive an input AC voltage at a fixed AC input voltage and provide an output AC power at a variable voltage and variable frequency, the variable speed drive comprising:

a converter stage connected to an AC power source providing the input AC voltage, the converter stage being configured to convert the input AC voltage to a boosted DC voltage;

a DC link connected to the converter stage, the DC link being configured to filter and store the boosted DC voltage from the converter stage; and

an inverter stage connected to the DC link, the inverter stage being configured to convert the boosted DC voltage from the DC link into the output AC power having the variable voltage and the variable frequency; and

a phase angle control circuit comprising;

a squaring amplifier, a first phase-lock loop circuit and a second phase-lock loop circuit;

the squaring amplifier configured to receive the AC power source and output a substantially rectangular output signal based on the AC power source;

the first phase-lock loop circuit including a first lag-lead filter configure to have a high filter cutoff frequency and a first capacitor to provides the converter stage with a phase angle parameter; and

the second phase-lock loop circuit including a second lag-lead filter configured to have a low cutoff frequency and a second capacitor to provide the second lag-lead filter the capability of storing an angle of the input AC voltage in a feedback loop of the second phase-lock loop during an AC power source interruption.

2. The variable speed drive of claim 1, wherein the first lag-lead filter includes a first resistor, a second resistor, wherein the first resistor has a resistance less than the second resistor, and the first capacitor is a small value integrating capacitor.

3. The variable speed drive of claim 2, wherein the resistance value for first resistor is about 43K ohms, and the resistance value for second resistor is about 120K ohms, and the capacitance of the first capacitor is about 0.47 uF.

4. The variable speed drive of claim 3, wherein the second lag-lead filter includes a third resistor and a fourth resistor, wherein the third resistor has a resistance greater than the fourth resistor, and the second capacitor is a large value integrating capacitor.

5. The variable speed drive of claim 4, wherein the resistance value the third resistor is about 510K ohms, the resistance value the fourth resistor is about 68K ohms and the capacitance value of the second capacitor is 2.2 uF.

6. The variable speed drive of claim 1, wherein each of the first phase-lock loop circuit and the second phase lock loop circuit includes a first sample and hold circuit and a first analog switch in communication with the first sample and hold circuit, the analog switch configured to hold a stored charge on the associated first or second capacitors within the first or second lag-lead filter and to prevent the discharge of the associated first or second capacitors.

7. The variable speed drive of claim 2, wherein the first resistor, the second resistor and the first capacitor are selected for fast locking operation of the first phase-lock loop.

8. The variable speed drive of claim 4, wherein the third resistor and the fourth resistor are selected based on their resistance values to provide a resistance ratio between the third resistor and the fourth resistor that minimizes step changes in a voltage fed to the Voltage Controlled Oscillator when the second analog switch changes state.

9. The variable speed drive of claim 6, wherein each analog switch of the first and second phase lock loop further including a mains voltage detector circuit controlled by sensing a loss of the AC power source input AC voltage.

10. The variable speed drive of claim 6, wherein each of the first and second phase lock loop having a phase detector circuit, a Voltage Controlled Oscillator and a divide by N circuit, the phase detector circuit having an out-of-lock detector responsive to a phase difference between the squaring amplifier square wave output and a comparison feedback signal generated by the divide by N counter in response to the voltage control oscillator.

11. The variable speed drive of-claim 10 wherein a divisor n of the divide-by-n counter is selected based on a desired resolution of the phase angle for a predetermined application.

12. The variable speed drive of claim 11 wherein the divide by n counter processes an output of the voltage controlled oscillator to generate a feedback signal, and the feedback signal is applied to a second input terminal of each phase detector to form a closed loop.

13. The variable speed drive of claim 12, wherein the divide by n counter generates a digital word representative of the mains phase angle, the digital word used to control a d-q angle of the output of the variable speed drive during an AC power source mains interruption.

14. The variable speed drive of claim 13, wherein the first phase-lock loop circuit and the second phase lock loop circuit are configured to maintain synchronous operation during a loss of the AC power source.

15. The variable speed drive of claim 14, wherein the duration of loss of the AC power source may be up to one second in duration while the drive maintains a phase error within a predetermined angle limit.