Rail to rail buffer amplifier

• US 7,764,123 B2
• Filed: 12/01/2008
• Issued: 07/27/2010
• Est. Priority Date: 12/18/2007
• Status: Expired due to Fees

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Kimura, Hiroyuki
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): Nguyen, Hieu P
• Application Number:
  US12/325,273
• Publication Number:
  US 20090153249A1
• Time in Patent Office: 603 Days
• Field of Search: 330262-265, 330/267
• US Class Current: 330/264
• CPC Class Codes: H03F 2200/297 the loading circuit of an amplifying stage comprising a capacitor
• CPC Class Codes: H03F 2200/513 the amplifier being made for low supply voltages
• CPC Class Codes: H03F 3/3016 with symmetrical driving of the end stage
• CPC Class Codes: H03F 3/505 with field-effect devices

Abstract

A buffer amplifier having a wide output voltage range includes a first source follower circuit having a first current source and a first transistor, and a second source follower circuit having a second current source and a second transistor. The first source follower circuit has an output terminal connected to a gate of a third transistor and a source of a fourth transistor. The second source follower circuit has an output terminal connected to a gate of a fifth transistor and a source of a sixth transistor. First and second voltages are respectively supplied to the gates of the fourth and sixth transistors. The sixth transistor is operated in place of the fifth transistor in a low voltage range, and the fourth transistor is operated in place of the third transistor in a high voltage range.

Claims

1. An amplifier circuit, comprising:

first and second source follower circuits supplied with an input voltage;

a first output transistor including a control terminal that receives an output of the first source follower circuit, and a first terminal, which is supplied with a power supply voltage;

a second output transistor including a control terminal that receives an output of the second source follower circuit, and a first terminal, which is supplied with a base voltage;

a first auxiliary transistor including a second terminal, which is connected to an output terminal of the first source follower circuit, and a control terminal, which receives a first bias voltage;

a second auxiliary transistor including a second terminal, which is connected to an output terminal of the second source follower circuit, and a control terminal, which receives a second bias voltage; and

an output means for outputting a voltage at a connection node of second terminals of the first and second output transistors and first terminals of the first and second auxiliary transistors.

2. The amplifier circuit according to claim 1, wherein:

the first source follower circuit includes a first current source and a first transistor of a first conductance type; and

the second source follower circuit includes a second current source and a second transistor of a second conductance type.

3. The amplifier circuit according to claim 2, wherein:

the first auxiliary transistor is activated when the first transistor is deactivated by supplying the first bias voltage, which is set based on a value obtained by subtracting a threshold voltage of the first transistor from the power supply voltage; and

the second auxiliary transistor is activated when the second transistor is deactivated by supplying the second bias voltage, which is set based on a value obtained by adding a threshold voltage of the second transistor to the base voltage.

4. The amplifier circuit according claim 2, wherein the first and the second transistors are each formed by a field-effect transistor element.

5. The amplifier circuit according claim 2, wherein the first and the second transistors are each formed by a bipolar transistor element.

6. An amplifier circuit for generating an output voltage, comprising:

a first source follower circuit, connected between a power supply line and a ground line, having an input terminal that receives an input voltage;

a second source follower circuit, connected between the power supply line and the ground line, having an input terminal that receives the input voltage;

a first output transistor having a drain connected to the power supply line and a gate connected to an output terminal of the first source follower circuit;

a second output transistor having a drain connected to the ground line and a gate connected to an output terminal of the second source follower circuit;

a first auxiliary transistor having a source connected to the output terminal of the first source follower circuit, and a gate that receives a first bias voltage; and

a second auxiliary transistor having a source connected to the output terminal of the second source follower circuit, and a gate that receives a second bias voltage, and wherein the output voltage is generated at a node connecting the sources of the first and second output transistors and the drains of the first and second auxiliary transistors.

7. The amplifier circuit of claim 6, wherein the first source follower circuit comprises a first current source and a first transistor connected to the first current source, and the second source follower circuit comprises a second current source and a second transistor connected to the second current source, wherein the gate terminals of the first and second transistors are connected together at the input terminals of the first and second source follower circuits.

8. The amplifier circuit of claim 7, wherein the first auxiliary transistor is activated when the first transistor is deactivated by supplying the first bias voltage at the gate of the first auxiliary transistor, wherein the first bias voltage is based on a value obtained by subtracting a threshold voltage of the first transistor from the power supply voltage;

and

the second auxiliary transistor is activated when the second transistor is deactivated by supplying the second bias voltage to the gate of the second auxiliary transistor, wherein the second bias voltage is based on a value obtained by adding a threshold voltage of the second transistor to the base voltage.