Multiple die wafers having increased reliability and methods of increasing reliability in same
First Claim
1. A method to increase a reliability of packaged semiconductor integrated circuit dice comprising:
- identifying one or more dice on a wafer having failed an electrical test;
adding the one or more failed dice to a character map;
adding a first tier of buffer dice to the initial character map adjacent to each die on the character map, wherein the adding the first tier of buffer dice comprisesidentifying a core die comprising an electrically malfunctioning die surrounded by a plurality of at least seven other electrically malfunctioning dice to form a cluster; and
locating electrically malfunctioning die on an outer edge of the cluster of malfunctioning die around the core die; and
indicating both the failed dice and the first tier of buffer dice, wherein dice not requiring packages are indicated.
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Accused Products
Abstract
A method increases a reliability of packaged semiconductor integrated circuit dice by identifying one or more dice on a wafer having failed an electrical test. One or more failed dice are added to a character map. A first tier of buffer dice is added to the initial character map adjacent to each die on the character map. Both the failed dice and the first tier of buffer dice are indicated or marked, such as by inking, thereby indicating dice not requiring packaging. A wafer may include multiple die, with die corresponding to the die in the character map being marked. The marked die thus include die that have failed an electrical test plus die that may be likely to fail in the future due to their proximity to the failed die.
14 Citations
18 Claims
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1. A method to increase a reliability of packaged semiconductor integrated circuit dice comprising:
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identifying one or more dice on a wafer having failed an electrical test; adding the one or more failed dice to a character map; adding a first tier of buffer dice to the initial character map adjacent to each die on the character map, wherein the adding the first tier of buffer dice comprises identifying a core die comprising an electrically malfunctioning die surrounded by a plurality of at least seven other electrically malfunctioning dice to form a cluster; and locating electrically malfunctioning die on an outer edge of the cluster of malfunctioning die around the core die; and indicating both the failed dice and the first tier of buffer dice, wherein dice not requiring packages are indicated. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16)
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12. A method to increase a reliability of packaged semiconductor integrated circuit dice, the method comprising:
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identifying one or more dice on a wafer having failed an electrical test; adding the one or more failed dice to a character map; adding a variable width exclusion zone of buffer dice to the character map adjacent to each die on the character map; and indicating dice in the character map as not requiring packaging.
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17. A multiple die wafer comprising:
a plurality of marked die, wherein the marked die are selected by a character map formed by; identifying one or more dice on a wafer having failed an electrical test; adding the one or more failed dice to the character map; and adding a variable width exclusion zone of buffer dice to the character map adjacent to each die on the character map.
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18. A multiple die wafer comprising:
a plurality of marked die, wherein the marked die are selected by a character map formed by; identifying one or more dice on a wafer having failed an electrical test; adding the one or more failed dice to a character map; and adding a first tier of buffer dice to the initial character map adjacent to each die on the character map.
Specification