Structure and method for improving shielded gate field effect transistors

• US 7,768,064 B2
• Filed: 01/04/2007
• Issued: 08/03/2010
• Est. Priority Date: 01/05/2006
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Challa, Ashok, Sapp, Steven, Kocon, Christopher B.
• Primary Examiner(s): Le; Thao X
• Assistant Examiner(s): GORDON, MATTHEW E
• Application Number:
  US11/620,002
• Publication Number:
  US 20080017920A1
• Time in Patent Office: 1,307 Days
• Field of Search: 257/330, 257/301, 257/E27.091, 438/243
• US Class Current: 257/330
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A field effect transistor is disclosed. In one embodiment, the field effect transistor includes a trench extending into a drift region of the field effect transistor. A shield electrode in a lower portion of the trench is insulated from the drift region by a shield dielectric. A gate electrode in the trench over the shield electrode is insulated from the shield electrode by an inter-electrode dielectric. A source region is formed adjacent the trench. A resistive element is coupled to the shield electrode and to a source region in the field effective transistor.

Claims

1. A field effect transistor comprising:

a trench extending into a drift region of the field effect transistor;

a shield electrode in a lower portion of the trench, wherein the shield electrode is insulated from the drift region by a shield dielectric;

a gate electrode in the trench over the shield electrode, wherein the gate electrode is insulated from the shield electrode by an inter-electrode dielectric;

source regions adjacent the trench;

a source metal contacting the source regions; and

a resistive element having one end contacting the shield electrode and another end contacting the source metal in the field effect transistor.

2. The field effect transistor of claim 1 wherein the resistive element induces a potential in the shield electrode during a switching event.

3. The field effect transistor of claim 1 wherein the resistive element induces a voltage in the shield electrode that changes with time during a switching event.

4. The field effect transistor of claim 1 wherein the resistive element induces a transient potential in the shield electrode that follows a transient potential in the drift region.

5. The field effect transistor of claim 1 wherein a potential in the drift region creates a charge in the shield electrode, and wherein the resistive element induces a potential in the shield electrode in dynamic response to the charge.

23. The field effect transistor of claim 1 wherein the resistive element comprises a poly-silicon layer connected between a shield electrode contact and a source metal contact.

24. The field effect transistor of claim 1 further comprising an independent shield metal line which contacts the resistive element and the shield electrode.

25. The field effect transistor of claim 1 wherein the resistive element is coupled to the shield electrode by a shield contact and to the source metal by a source contact.

6. A semiconductor device comprising:

a drift region of a first conductivity type;

a well region extending above the drift region and having a second conductivity type opposite the first conductivity type;

a trench extending through the well region and into the drift region, the trench having its sidewalls and bottom lined with dielectric material, the trench further including a shield conductive layer and a gate conductive layer above the shield conductive layer, the shield conductive layer being separated from the gate conductive layer by an inter-electrode dielectric material;

source regions having the first conductivity type formed in the well region adjacent to the trench;

a source metal contacting the source regions; and

a resistive element having one end contacting the shield conductive layer and another end contacting the source metal.

7. The semiconductor device of claim 6 wherein the resistive element is a poly-silicon layer.

8. The semiconductor device of claim 6 wherein the resistive element is a single resistor.

9. The semiconductor device of claim 6 wherein the resistive element comprises multiple resistors.

10. The semiconductor device of claim 6 wherein the resistive element comprises at least two resistors connected in parallel.

11. The semiconductor device of claim 6 wherein the resistive element is coupled to a protective diode shunt.

12. The semiconductor device of claim 6 wherein the resistive element is connected in parallel to a Zener diode.

13. The semiconductor device of claim 6 wherein the resistive element is less than 30 ohms.

14. The semiconductor device of claim 6 wherein the resistive element is coupled to the shield conductive layer by a shield contact and to the source metal by a source contact.

15. The semiconductor device of claim 6 wherein the resistive element has a serpentine shape.

16. The semiconductor device of claim 6 further configured to be used in a DC-DC converter.

17. A field effect transistor comprising:

a plurality of trenches extending into a drift region;

a shield electrode in a lower portion of each trench, wherein the shield electrode is insulated from the drift region by a shield dielectric;

a gate electrode in each trench over the shield electrode, wherein the gate electrode is insulated from the shield electrode by an inter-electrode dielectric;

source regions adjacent the trenches;

a source metal contacting the source regions; and

a resistive element having one end contacting the shield electrode and another end contacting the source metal.

26. The field effect transistor of claim 17 wherein the resistive element comprises a poly-silicon layer connected between a shield electrode contact and a source contact.

27. The field effect transistor of claim 17 further comprising an independent shield metal line which contacts the resistive element and the shield electrodes.

28. The field effect transistor of claim 17 wherein the resistive element is coupled to the shield electrode by a shield contact and to the source metal by a source contact.

18. A method of forming a field effect transistor comprising:

forming a plurality of trenches in a drift region;

forming a shield electrode in a lower portion of each trench, the shield electrode being insulated from the drift region by a shield dielectric;

forming a gate electrode in each trench over the shield electrode, the gate electrode being insulated from the shield electrode by an inter-electrode dielectric;

forming source regions adjacent the trenches;

forming a source metal contacting the source regions; and

forming a resistive element having one end contacting the shield electrode and another end contacting the source metal.

19. The method of claim 18 wherein the step of forming the resistive element comprises forming a poly-silicon layer between a shield electrode contact and a source contact.

20. The method of claim 18 wherein the step of forming the shield electrode comprises depositing an independent shield metal line for contacting the resistive element and the shield electrodes.

21. The method of claim 18 further comprising coupling a protective diode shunt to the resistive element.

22. The method of claim 18 wherein the step of forming the resistive element comprises forming a resistor at a location where a shield electrode in one trench is connected to at least one other shield electrode in another trench.