Electronic switching device, in particular circuit-breaker and associated operating method

• US 7,768,758 B2
• Filed: 09/19/2005
• Issued: 08/03/2010
• Est. Priority Date: 09/27/2004
• Status: Expired due to Fees

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Rupp, Jurgen, Schrock, Michael, Maier, Reinhard
• Primary Examiner(s): Fureman; Jared J
• Assistant Examiner(s): WILLOUGHBY, TERRENCE RONIQUE
• Application Number:
  US11/663,818
• Publication Number:
  US 20080048806A1
• Time in Patent Office: 1,779 Days
• Field of Search: 361/93.1, 361/100, 361/101, 361/102, 361/115, 361 937- 939, 335/6, 335/7, 335/18
• US Class Current: 361/93.1
• CPC Class Codes: H03K 17/08148 in composite switches
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Abstract

An anti-serial cascade circuit including two silicon carbide JFETs and two silicon MOSFETs is known. Disclosed is a combination of a JFET, a smart power MOSFET SPM and a thyristor with an associated trigger circuit, which is connected in parallel to the SPM. According to an embodiment of the invention, a logic circuit co-ordinates the functional sequence.

Claims

1. Electronic switching device, comprising:

means for an undelayed switch-on;

means for an undelayed operational switch-off at the zero crossing point of the current, both during operation and on overload;

means for an immediate switch-off as a short-circuit protection, with overload protection;

means for an isolated activation, an isolated status message and a power supply at switch potential;

an SiC-JFET with a MOSFET embodied as an SPM (Smart Power MOSFET); and

at least one thyristor, the thyristor being switched in parallel with the SPM and with the combination of SiC-JFET and SPM with parallel switched thyristor being assigned a logic circuit.

2. The electronic switching device as claimed in claim 1, wherein a potential-decoupled activation unit is assigned to the at least one thyristor.

3. The electronic switching device as claimed in claim 1, functions phase-controlled switch-on and overload protection/branch are implemented in conjunction with the other phases in the thyristor activation circuit.

4. The electronic switching device as claimed in claim 2, wherein the thyristor activation circuit implements an overload protection unit.

5. The electronic switching device as claimed in claim 1, wherein the SPM brings about short-circuit protection, current limiting and overload protection for undelayed switching on, undelayed switching off.

6. The electronic switching device as claimed in claim 5, wherein the combination of the SiC-JFET with the MOSFET embodied as SPM includes an activation circuit and the associated logic circuit, wherein at least one thyristor for switching off at the zero current crossing point is present in parallel with the SPM and wherein the logic circuit is used for coordination of the SPM and the at least one thyristor.

7. The electronic switching device as claimed in claim 1, further comprising means for potential isolation.

8. The electronic switching device as claimed in claim 1, further comprising means for overvoltage protection.

9. The electronic switching device as claimed in claim 1, further comprising means for temperature measuring and for thermal overload protection.

10. Method of operation of an electronic switching device as claimed in claim 5 wherein the states are interrogated in a logical sequence and, depending on the result, at least one of the SPM and the thyristor/activation circuit are activated.

11. The method of operation as claimed in claim 10, wherein first the SPM, and subsequently the thyristor activation circuit cut in.

12. The method of operation as claimed in claim 10, wherein the logical sequence is undertaken using software.

13. The method of operation as claimed in claim 10, wherein a logic circuit with scheduling is used.

14. Electronic switching device, comprising:

an SiC-JFET with a MOSFET embodied as an SPM (Smart Power MOSFET); and

at least one thyristor, the thyristor being switched in parallel with the SPM and with the combination of SiC-JFET and SPM with parallel switched thyristor being assigned a logic circuit.

15. The electronic switching device as claimed in claim 14, wherein a potential-decoupled activation unit is assigned to the at least one thyristor.

16. The electronic switching device as claimed in claim 14, functions phase-controlled switch-on and overload protection/branch are implemented in conjunction with the other phases in the thyristor activation circuit.

17. The electronic switching device as claimed in claim 14, wherein the SPM brings about short-circuit protection, current limiting and overload protection for undelayed switching on, undelayed switching off.

18. The electronic switching device as claimed in claim 17, wherein the combination of the SiC-JFET with the MOSFET embodied as SPM includes an activation circuit and the associated logic circuit, wherein at least one thyristor for switching off at the zero current crossing point is present in parallel with the SPM and wherein the logic circuit is used for coordination of the SPM and the at least one thyristor.

19. Electronic switching device for at least one of an undelayed switch-on;

an undelayed operational switch-off at the zero crossing point of the current, both during operation and on overload;

an immediate switch-off as a short-circuit protection, with overload protection; and

an isolated activation, an isolated status message and a power supply at switch potential, the electronic switching device comprising;

an SiC-JFET with a MOSFET embodied as an SPM (Smart Power MOSFET); and

at least one thyristor, the thyristor being switched in parallel with the SPM and with the combination of SiC-JFET and SPM with parallel switched thyristor being assigned a logic circuit.

20. The electronic switching device as claimed in claim 19, wherein a potential-decoupled activation unit is assigned to the at least one thyristor.