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Partial-write-collector algorithm for multi level cell (MLC) flash

  • US 7,769,944 B2
  • Filed: 07/09/2007
  • Issued: 08/03/2010
  • Est. Priority Date: 10/01/2004
  • Status: Expired due to Fees
First Claim
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1. A flash memory system comprising:

  • an multi level cell (MLC) flash memory organized into blocks having pages of information, a page of information including data and spare, the MLC flash memory including at least a partial write collector (PWC) block adapted to temporarily store at least a portion of a page of information during a partial write operation, the MLC flash memory configured to store a page of information into a block identified by a target physical address; and

    a flash controller coupled to cause communication between a host flash card controller and the MLC flash memory and including a buffer configured to store a portion of a page of information,wherein the controller writes the at least a portion of a page of information to the PWC block and later copies the written at least a portion of a page of information into the block identified by a target physical address.

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