Strained semiconductor device and method of making same

• US 7,772,676 B2
• Filed: 06/23/2006
• Issued: 08/10/2010
• Est. Priority Date: 06/23/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG, International Business Machines Corporation
• Original Assignee: Infineon Technologies AG, International Business Machines Corporation
• Inventors: Holt, Judson R., Ng, Hung Y., Han, Jin-Ping
• Primary Examiner(s): Purvis; Sue
• Assistant Examiner(s): QUINTO, KEVIN V
• Application Number:
  US11/473,883
• Publication Number:
  US 20070295989A1
• Time in Patent Office: 1,509 Days
• Field of Search: 257/613, 257/616, 257/213, 257/288, 257/368, 257/382, 257/384, 257/E21.616, 257/E21.619, 438/142, 438/197, 438/299, 438/300
• US Class Current: 257/616
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66628 recessing the gate by forming single crystalline semiconductor material at the source or drain location
• CPC Class Codes: H01L 29/66636 with source or drain recessed by etching or first recessed by etching and then refilled
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain

Abstract

A semiconductor body is formed from a first semiconductor material, e.g., silicon. A compound semiconductor region, e.g., silicon germanium, is embedded in the semiconductor body. The compound semiconductor region includes the first semiconductor material and a second semiconductor material. The compound semiconductor region has a concentration of the second semiconductor material that varies along an interface between the side portion of the compound semiconductor region and the side portion of the semiconductor body

Claims

1. A semiconductor structure comprising:

a semiconductor body comprising a first semiconductor material; and

a compound semiconductor region embedded in the semiconductor body such that a side portion of the compound semiconductor region abuts a side portion of the semiconductor body, the compound semiconductor region including the first semiconductor material and a second semiconductor material, wherein the compound semiconductor region has an upper surface that extends beyond the upper surface of the semiconductor body, wherein the compound semiconductor region has a concentration of the second semiconductor material that varies along an interface between the side portion of the compound semiconductor region and the side portion of the semiconductor body, wherein the variation along the interface comprises a lower first region adjacent the interface, a second region disposed on the first region, and a third region disposed on the second region, wherein the concentration of the second semiconductor material in the first region increases about linearly from a first concentration to a second concentration, wherein the concentration of the second semiconductor material in the third region decreases about linearly from the second concentration to a third concentration, and wherein the concentration of the second semiconductor material has a peak value adjacent an upper surface of the semiconductor body.

2. The structure of claim 1, wherein the first semiconductor material comprises silicon and the second semiconductor material comprises germanium.

3. The structure of claim 1, wherein the concentration of the second semiconductor material in the second region is about constant around the second concentration, and wherein the second concentration of the second semiconductor material in the second region has a peak value of between about 24% and about 36%.

4. The structure of claim 1, further comprising a fourth region disposed under the first region, wherein the concentration of the second semiconductor material in the fourth region is about the first concentration, wherein a bottom portion of the compound semiconductor region abuts the semiconductor body along a lateral surface that is spaced from the upper surface of the compound semiconductor region, and wherein the first concentration in the first region is lower than the third concentration.

5. A method of making a semiconductor device, the method comprising:

providing a semiconductor body including an upper surface, the semiconductor body comprising a first material;

forming a gate region over the upper surface of the semiconductor body;

creating a recess in the upper surface of the semiconductor body adjacent the gate region; and

forming a compound semiconductor in the recess, the compound semiconductor comprising a crystalline mixture of the first material and a second material with a different lattice spacing than a lattice spacing of the first material, wherein forming the compound semiconductor comprises;

epitaxially depositing a first layer, wherein the concentration of the second material in the first layer increases from a first concentration at a lower surface to a second concentration at an upper surface;

depositing a second layer on the first layer, the second layer being epitaxially aligned to the upper surface of the first layer, wherein the concentration of the second material in the second layer is about the second concentration; and

epitaxially depositing a third layer on the second layer, wherein the concentration of the second material in the third layer decreases from the second concentration at a lower surface to a third concentration at an upper surface.

6. The method of claim 5, wherein forming the compound semiconductor comprises in situ doping the compound semiconductor.

7. The method of claim 5, wherein depositing the first, the second, and the third regions comprises growing silicon germanium.

8. The method of claim 7, wherein growing the silicon germanium comprises selectively growing silicon germanium in the recess.

9. The method of claim 7, wherein growing the silicon germanium comprises:

exposing the semiconductor body to silicon and germanium source gases; and

varying a flow rate of the germanium source gas so as to vary the concentration of germanium as a function of the depth of the compound semiconductor within an active area.

10. The method of claim 9, wherein the silicon source gas comprises SiH₄ and wherein the germanium source gas comprises GeH₄.

11. The method of claim 9, wherein exposing the semiconductor body to the silicon and germanium source gases further comprises exposing the semiconductor body to HCl.

12. The method of claim 9, wherein exposing the semiconductor body to the silicon and germanium source gases further comprises exposing the semiconductor body to a dopant gas.

13. The method of claim 12, wherein the dopant gas comprises B₂H₆.

14. A method of forming a transistor device, the method comprising:

providing a semiconductor body including an upper surface, the semiconductor body comprising a first semiconductor material;

forming a gate region over the upper surface of the semiconductor body;

creating a recess in the upper surface of the semiconductor body adjacent the gate region; and

filling the recess with a compound semiconductor by exposing the semiconductor body to a first source gas for the first semiconductor material and a second source gas for a second semiconductor material, wherein flow rates for at least one of the first and/or second source gases are varied over time such that the compound semiconductor has a graded concentration of the second semiconductor material, and wherein filling the recess with the compound semiconductor comprises;

exposing the semiconductor body to the second source gas with a first flow rate of less than 50 sccm;

after exposing the semiconductor body to the second source gas with the first flow rate, ramping up the flow rate to a second flow rate between 50 sccm and 100 sccm;

after ramping up the flow rate from the first flow rate to the second flow rate, holding the second flow rate constant for a period of time; and

after holding the second flow rate constant, ramping down the flow rate to a third flow rate.

15. The method of claim 14, wherein filling the recess with the compound semiconductor comprises forming a compound semiconductor having a concentration of the second semiconductor material that ranges from about 18%-22% near a bottom portion to a peak concentration of between about 24%-36%.

16. The method of claim 14, wherein the first semiconductor material comprises silicon and the second semiconductor material comprises germanium.

17. The method of claim 16, wherein the first source gas for the first semiconductor material comprises SiH₄ and the second source gas for the second semiconductor material comprises GeH₄.