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Test operation of multi-port memory device

  • US 7,773,439 B2
  • Filed: 12/28/2006
  • Issued: 08/10/2010
  • Est. Priority Date: 04/13/2006
  • Status: Active Grant
First Claim
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1. A multi-port memory device, comprising:

  • a plurality ports for performing a serial input/output (I/O) data transmission;

    a plurality of I/O pads coupled to the ports;

    a plurality of banks for performing a parallel I/O data transmission with the ports;

    a plurality of global data buses for transmitting data between the ports and the banks;

    a test I/O controller for transmitting a test signal and a test input signal to the banks through the global data buses without passing through the ports and transmitting a test output signal from the banks in response to the test signal through the global data buses during a test operation mode.

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