Method of transmitting data between storage virtualization controllers and storage virtualization controller designed to implement the method
First Claim
1. A method of transmitting data between storage virtualization controllers in a computer system, the storage virtualization controllers comprising a first storage virtualization controller (SVC) and a second SVC, in which the first SVC comprises a first central processing unit (CPU), a first CPU chipset, a first interface and a first memory, and the second SVC comprises a second CPU, a second CPU chipset, a second interface and a second memory, the method comprising the steps of:
- the first CPU of the first SVC sending a direct data transfer request to the first CPU chipset of the first SVC;
the first interface in the first CPU chipset reading the direct data transfer request from a CPU interface in the first CPU chipset, in which the first interface is coupled to the second SVC through an inter-controller communication channel, and transfers the direct data transfer request to the second SVC via the inter-controller communication channel, wherein the second interface in the second interface in the second SVC receives the direct data transfer request; and
the direct data transfer request comprising a virtual address obtained by converting from one of a start address and an offset address of an access destination such that the first interface recognizes, through the virtual address, the direct data transfer request, and the first interface performs direct data access to the second memory of the second SVC.
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Abstract
A method of transmitting data between storage virtualization controllers (SVCs) in a computer system is disclosed, in which there is an inter-controller communication channel (ICC) between the storage virtualization controllers. The method comprises the steps of: a central processing unit (CPU) of one storage virtualization controller (SVC) sending a data transfer request to an interface that establishes the ICC when the CPU needs to transmit information to the other SVC; and transmitting the information to the other SVC after the interface that establishes the ICC receives the data transfer request, and obtains the information.
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Citations
19 Claims
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1. A method of transmitting data between storage virtualization controllers in a computer system, the storage virtualization controllers comprising a first storage virtualization controller (SVC) and a second SVC, in which the first SVC comprises a first central processing unit (CPU), a first CPU chipset, a first interface and a first memory, and the second SVC comprises a second CPU, a second CPU chipset, a second interface and a second memory, the method comprising the steps of:
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the first CPU of the first SVC sending a direct data transfer request to the first CPU chipset of the first SVC; the first interface in the first CPU chipset reading the direct data transfer request from a CPU interface in the first CPU chipset, in which the first interface is coupled to the second SVC through an inter-controller communication channel, and transfers the direct data transfer request to the second SVC via the inter-controller communication channel, wherein the second interface in the second interface in the second SVC receives the direct data transfer request; and the direct data transfer request comprising a virtual address obtained by converting from one of a start address and an offset address of an access destination such that the first interface recognizes, through the virtual address, the direct data transfer request, and the first interface performs direct data access to the second memory of the second SVC. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A storage virtualization controller (SVC), comprising:
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a first CPU; a first memory for storing data; a first CPU chipset coupled to the first CPU and the first memory; and a first local bus interface in the first CPU chipset for coupling to a second local bus interface of a second SVC, in which the first CPU sends a direct data transfer request to the second SVC via the first local bus interface of the first CPU chipset to directly access data in a second memory of the second SVC via the second local bus interface of the second SVC through an inter-controller communication channel, and the direct data transfer request comprises a virtual address obtained by converting from one of a start address and an offset address of an access destination, such that the first local bus interface recognizes, through the virtual address, the direct data transfer request, and the first local bus interface performs direct data access to the second memory of the second SVC. - View Dependent Claims (10, 11, 12)
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13. A storage virtualization subsystem, comprising:
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a first virtualization controller SVC and a second SVC, in which the first SVC comprises a first central processing unit (CPU), a first CPU chipset, a first local bus interface and a first memory, and the second SVC comprises a second CPU, a second CPU chipset, a second local bus interface and a second memory; an inter-controller communication channel provided between the SVCs for exchanging information; and the first CPU of the first SVC for transmitting a direct data transfer request through the inter-controller communication channel so as to perform direct data access on the second memory of the second SVC, in which the direct data transfer request comprises a virtual address obtained by converting from one of a start address and an offset address of an access destination such that the first local bus interface recognizes, through the virtual address, the direct data transfer request, and the first local bus interface reads the direct data transfer request to the second memory of the second SVC. - View Dependent Claims (14, 15, 16)
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17. A storage virtualization computer system, comprising:
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a host entity for sending an input/output (I/O) requests; a first storage virtualization controller (SVC) and a second SVC which are coupled to the host entity for performing operations in response to the I/O requests, in which the first SVC comprises a first central processing unit (CPU), a first CPU chipset, a first local bus interface and a first memory, and the second SVC comprises a second CPU, a second CPU chipset, a second local bus interface and a second memory; an inter-controller communication channel provided between the SVCs for allowing the SVCs to exchange information therebetween; a plurality of physical storage devices coupled to the SVCs to provide data storage space for the host entity; and the first CPU of the first SVC for sending, through the inter-controller communication channel, a direct data transfer request to the second SVC, to perform direct data access on the second memory of the second SVC, in which the direct data transfer request comprises a virtual address obtained by converting from one of a start address and an offset address of an access destination such that the first local bus interface recognizes, through the virtual address, the direct data transfer request, and the first local bus interface reads the direct data transfer request, in which the virtual address is directed to the second memory of the second SVC. - View Dependent Claims (18, 19)
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Specification